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Computer apparatus and method for autonomic adjustment of block transfer size

  • US 20040236924A1
  • Filed: 05/22/2003
  • Published: 11/25/2004
  • Est. Priority Date: 05/22/2003
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • at least one processor;

    a memory coupled to the at least one processor;

    a plurality of memory portions that each have a specified block transfer size independent of block transfer size of other of the plurality of memory portions;

    an operating system residing in the memory and executed by the at least one processor, the operating system accessing each of the plurality of memory portions using the corresponding specified block transfer size; and

    a dynamic block transfer size adjustment mechanism that compiles a history of how a selected memory portion is accessed and that dynamically adjusts the block transfer size of the memory portion, as required, according to the compiled history.

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