Pre-boot interpreted namespace parsing for flexible heterogeneous configuration and code consolidation

• US 20040236934A1
• Filed: 05/21/2003
• Published: 11/25/2004
• Est. Priority Date: 05/21/2003
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Zimmer, Vincent J., Rothman, Michael A.
• Granted Patent: US 7,107,441 B2
• Time in Patent Office: Days
• US Class Current: 713/1
• CPC Class Codes: G06F 9/4411 Configuring for operating with peripheral devices; Loading of device drivers

Abstract

A system and method to interact with a hardware device of a processing system. An interpreted language code defining how to interact with the hardware device of the processing system is provided. The interpreted language code is interpreted to interact with the hardware device of the processing system prior to entering an operating system runtime mode of operation of the processing system.

Claims

1. A method, comprising:

providing an interpreted language code to a processing system, the interpreted language code defining how to interact with a hardware device of the processing system; and

interpreting the interpreted language code to interact with the hardware device of the processing system prior to entering an operating system (“

OS”

) runtime mode of operation of the processing system.

2. The method of claim 1 wherein the OS runtime mode of operation is entered no earlier than the beginning of loading an OS into system memory of the processing system.

3. The method of claim 2, further comprising interpreting the interpreted language code to interact with the hardware device after entering the OS runtime mode of operation.

4. The method of claim 1 wherein the interpreted language code is compliant with an advance configuration and power interface (“

ACPI”

) specification.

5. The method of claim 4 wherein the interpreted language code comprises ACPI machine language(“

AML”

).

6. The method of claim 1, further comprising interpreting the interpreted language code prior to entering the OS runtime mode of operating to interact with a plurality of other hardware devices.

7. The method of claim 1 wherein interacting with the hardware device includes configuring the hardware device to reflect user-selectable changes.

8. A method, comprising:

providing an interpreted language code defining how to interact with one or more hardware devices of a processing system;

interpreting the interpreted language code during a pre-boot runtime of the processing system; and

interacting with at least one hardware device of the processing system based on the interpretation of the interpreted language code.

9. The method of claim 8 wherein the interpreted language code is compliant with an advance configuration and power interface (“

ACPI”

) specification.

10. The method of claim 9 wherein the interpreted language code comprises ACPI machine language (“

AML”

).

11. The method of claim 8, further comprising:

interpreting the same interpreted language code during an operating system (“

OS”

) runtime of the processing system; and

interacting with at least one hardware device of the processing system based on the interpretation of the interpreted language code.

12. The method of claim 11 wherein the interpretation of the interpreted language code during the pre-boot is executed by a firmware driver.

13. The method of claim 11 wherein the interpretation of the interpreted language code during the OS runtime is executed by an OS driver.

14. An article of manufacture comprising a computer-accessible medium having stored thereon instructions that, when executed by a processor, cause the processor to:

interpret a first portion of an interpreted language code defining how to interact with a hardware device of a processing system; and

interact with the hardware device of the processing system based on the interpretation of the first portion of the interpreted language code prior to entering an operating system (“

OS”

) runtime mode of operation of the processing system.

15. The computer-accessible medium of claim 14 wherein the interpreted language code is compliant with an advance configuration and power interface (“

ACPr”

) specification.

16. The computer-accessible medium of claim 15 wherein the interpreted language code comprises an ACPI machine language.

17. The computer-accessible medium of claim 14 wherein the interpreted language code includes a plurality of other portions defining how to interact with a corresponding plurality of other hardware devices of the processing system, the computer-accessible medium having further instructions stored thereon that cause the processor to interact with the plurality of other hardware devices based on the corresponding interpretations of the plurality of other portions of the interpreted language code.

18. A processing system, comprising:

a processor;

a hardware device communicatively coupled to the processor; and

flash memory communicatively coupled to the processor, the flash memory having stored therein an interpreted language code defining how to interact with the hardware device, the processor to execute the interpreted language code via an interpreter to interact with the hardware device prior to executing operating system (“

OS”

) files.

19. The processing system of claim 18 wherein the hardware device includes a component of a motherboard of the processing system.

20. The processing system of claim 19 wherein the component of the motherboard includes a serial port.

21. The processing system of claim 19 wherein the component of the motherboard includes a PS/2 keyboard controller.

22. The processing system of claim 18 wherein the interpreter is stored in the flash memory unit.

23. The processing system of claim 18 wherein the interpreter comprises an extensible firmware interface driver.

24. The processing system of claim 18 wherein the processor executes an OS driver to interpret the interpreted language code to interact with the hardware device during an OS runtime of the processing system.

25. The processing system of claim 18 wherein the interpreted language code includes advance configuration and power interface machine language (“

AML”

).

26. The processing system of claim 18 wherein the interpreted language code further defines how to interact with a plurality of other hardware devices of the processing system.