System and method for determining transaction time-out

• US 20040237006A1
• Filed: 05/09/2003
• Published: 11/25/2004
• Est. Priority Date: 05/09/2003
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Adkisson, Richard W., Chong, Huai-Ter V.
• Granted Patent: US 7,219,268 B2
• Time in Patent Office: Days
• US Class Current: 714/55
• CPC Class Codes: G06F 11/0724 in a multiprocessor or a multi-core unit multiprocessors per se G06F15/80
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

Disclosed are systems and methods for determining time-outs with respect to a plurality of transactions comprising utilizing a first time-out clock for simultaneously determining time-out states with respect to a first set of transactions of the plurality of transactions, and determining when transactions of the first set of transactions have reached a timed-out state of the time-out states.

Claims

1. A method for determining time-outs with respect to a plurality of transactions, said method comprising:

utilizing a first time-out clock for simultaneously determining time-out states with respect to a first set of transactions of said plurality of transactions; and

determining when transactions of said first set of transactions have reached a timed-out state of said time-out states.

2. The method of claim 1, wherein said first time-out clock provides epochs of a first time-out interval, said method comprising:

moving a state associated with a transaction of said first set of transactions to a first time-out state irrespective of a state of an epoch of said first time-out interval; and

moving said state associated with said transaction to said timed-out state upon expiration of an epoch of said first time-out interval.

3. The method of claim 1, further comprising:

prioritizing said transactions of said first set of transactions having reached said timed-out state for time-out processing serially.

4. The method of claim 1, further comprising:

time-out processing said transactions of said first set of transactions having reached said timed-out state to thereby clear said transactions from system resources.

5. The method of claim 4, wherein said time-out processing comprises:

determining if a particular one of said transactions currently being time-out processed has been completed normally after said particular transaction reached said timed-out state.

6. The method of claim 1, further comprising:

utilizing a second time-out clock for simultaneously determining time-out states with respect to a second set of transactions of said plurality of transactions; and

determining when transactions of said second set of transactions have reached a timed-out state of said time-out states.

7. The method of claim 6, wherein said first time-out clock provides epochs of a first time-out interval and said second time-out clock provides epochs of a second time-out interval, wherein said first and second time-out intervals are different.

8. The method of claim 6, further comprising:

classifying transactions for association with said first set of transactions and said second set of transactions.

9. The method of claim 8, wherein transactions default to said first set of transactions and said classifying transactions moves particular transactions to said second set of transactions.

10. A system for determining time-outs with respect to a plurality of transactions, said system comprising:

a first time-out counter providing a time-out interval of a first predetermined length; and

a first plurality of state registers each being associated with a corresponding transaction of said plurality of transactions, wherein first states of said first plurality of state registers are advanced to a next state in accordance with said first time-out interval of said first time-out counter, and wherein a particular state of said first states advanced to in accordance with said time-out intervals corresponds to a timed-out state.

11. The system of claim 10, wherein said first time-out counter provides relatively high resolution counting.

12. The system of claim 11, wherein said relatively high resolution counting comprises at least 32 bit counting.

13. The system of claim 10, wherein said first states of said first plurality of state registers comprise an initial state which is entered irrespective of a status of said time-out interval of said first time-out counter and advanced to a next state in accordance with said time-out interval of said first time-out counter, thereby providing a time-out uncertainty window with respect to said timed-out state.

14. The system of claim 13, wherein said time-out uncertainty window is a function of said time-out interval of said first time-out counter.

15. The system of claim 14, wherein said time-out uncertainty window defines a time-out period range of from 2 times said time-out interval of said first time-out counter to 3 times said time-out interval of said first time-out counter.

16. The system of claim 10, further comprising:

priority encode logic operable to prioritize further processing with respect to a plurality of transactions having reached a timed-out state simultaneously.

17. The system of claim 10, further comprising:

a second time-out counter providing a time-out interval of a second predetermined length, wherein second states of said first plurality of state registers are advanced to a next state in accordance with said time-out interval of said second time-out counter, and wherein a particular state of said second states advanced to in accordance with said second time-out interval corresponds to a timed-out state.

18. The system of claim 17, wherein said time-out interval of said first time-out counter is of a different predetermined length that said time-out interval of said second time-out counter.

19. The system of claim 17, wherein said first time-out counter and said first states are associated with a first classification of transaction and said second time-out counter and said second states are associated with a second classification of transactions.

20. The system of claim 17, wherein said first states and said second states are used cooperatively to determine a timed-out state with respect to a single transaction.

21. The system of claim 17, further comprising:

arbitration logic operable to arbitrate further processing with respect to transactions having reached a timed-out state associated with said first states and transactions having reached a timed-out state associated with said second states.

22. A system for determining time-outs with respect to a plurality of transactions, said system comprising:

a first state machine having at least a pending state, a first time-out state and a timed-out state for each of a first set of transactions of said plurality of transactions, wherein said first state machine is operable to sequence transactions of said first set of transactions to said pending state irrespective of the status of a first time-out counter and is operable to sequence said transactions of said first set of transactions from said pending state to said first time-out state in accordance with expiration of said first time-out counter, wherein said timed-out state is entered by said transactions of said first set of transactions in accordance with expiration of said first time-out counter.

23. The system of claim 22, wherein said first state machine further comprises:

a second time-out state, wherein said state machine is operable to sequence said transactions of said first set of transactions from said first time-out state to said second time-out state in accordance with expiration of said first time-out counter and is operable to sequence said transactions of said first set of transactions from said second time-out state to said timed-out state in accordance with expiration of said first time-out counter.

24. The system of claim 23, wherein said first state machine provides a time-out window having a time-out uncertainty of one period of said first time-out counter.

25. The system of claim 22, further comprising:

priority logic establishing a priority hierarchy with respect to transactions having reached said timed-out state.

26. The system of claim 22, wherein said first state machine also has at least a pending state, a first time-out state and a timed-out state for each of a second set of transactions of said plurality of transactions, wherein said first state machine is operable to sequence transactions of said second set of transactions to said pending state of said second set of transactions irrespective of the status of a second time-out counter and is operable to sequence said transactions of said second set of transactions from said pending state to said first time-out state of said second set of transactions in accordance with expiration of said second time-out counter, wherein said timed-out state of said second set of transactions is entered by said transactions of said second set of transactions in accordance with expiration of said second time-out counter.

27. The system of claim 22, further comprising:

a second state machine having at least a pending state, a first time-out state and a timed-out state for each of a third set of transactions of said plurality of transactions, wherein said second state machine is operable to sequence transactions of said third set of transactions to said pending state irrespective of the status of a third time-out counter and is operable to sequence said transactions of said third set of transactions from said pending state to said first time-out state in accordance with expiration of said third time-out counter, wherein said timed-out state is entered by said transactions of said third set of transactions in accordance with expiration of said third time-out counter.