Memory device with function to perform operation, and method of performing operation and storage

• US 20040240251A1
• Filed: 05/12/2004
• Published: 12/02/2004
• Est. Priority Date: 05/27/2003
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Kato, Hiroaki, Nozawa, Hiroshi, Fujimori, Yoshikazu
• Granted Patent: US 7,038,930 B2
• Time in Patent Office: Days
• US Class Current: 365/145
• CPC Class Codes: G11C 11/22 using ferroelectric elements

Abstract

To provide a memory device with a function to perform an operation and a method of performing an operation and storage which can save space and cost and which can start, immediately after the power source is recovered, the processing which was being performed at the time of power failure. A memory cell MC can store two independent data sets; DRAM data (volatile data) and FeRAM data (non-volatile data). Thus, the number of memory cells can be reduced to a half. Also, the DRAM data to be used in the next operation of the two data sets which have been read out for the previous operation are temporarily held in a hold circuit 21 of an operation unit OU and then written back into the memory cell MC in a non-volatile manner as new FeRAM data for preparation of the next operation. Thus, even when the power source is shut down by an unexpected trouble, the data necessary for the next operation are not lost.

Claims

1. A memory device with a function to perform an operation comprising:

a memory section having a memory cell for storing first data in a non-volatile manner and second data in a volatile manner; and

an operation and storage control section for making controls to read out said first and second data stored in said memory cell and perform an operation on said first and second data, and to write said read-out second data into said memory cell in a non-volatile manner as new first data.

2. The memory device with a function to perform an operation as set forth in claim 1, wherein said operation and storage control section makes a control to write the result of said operation on said first and second data into said memory cell in a volatile manner as new second data.

3. The memory device with a function to perform an operation as set forth in claim 1, wherein said operation and storage control section makes controls to read out said second and first data from said memory cell in this order and write new first and second data into said memory cell in this order.

4. The memory device with a function to perform an operation as set forth in claim 1, wherein said memory section has one or more word units each comprising a plurality of memory cells, and said operation and storage control section has operation units corresponding to, and in the same number of, said word units,

wherein said operation and storage control section controls each of said operation units to perform an operation on a plurality of memory cells of its corresponding word unit one by one.

5. The memory device with a function to perform an operation as forth in claim 4, wherein each of said operation units comprises:

a first hold circuit for temporarily holding said second data read out from a memory cell being processed;

an operation circuit for performing an operation on said first and second data read out from said memory cell; and

a second hold circuit for temporarily holding said first data read out from said memory cell or a result of said operation of said operation circuit, wherein said operation and storage control section makes a control to write said second data held in said first hold circuit into said memory cell in a non-volatile manner as new first data.

6. The memory device with a function to perform an operation as set forth in claim 1, wherein said memory cell comprises a ferroelectric capacitor and stores first data in a non-volatile manner according to a change in the polarization direction of said ferroelectric capacitor and second data in a volatile manner according to a change in the polarization state of said ferroelectric capacitor with no polarization reversal thereof.

7. The memory device with a function to perform an operation as set forth in claim 6, wherein said ferroelectric capacitor has a coercive voltage which is higher than a half of the source voltage of said memory device with a function to perform an operation and is lower than said source voltage.

8. The memory device with a function to perform an operation as set forth in claim 2, wherein said operation and storage control section makes controls to read out said second and first data from said memory cell in this order and write new first and second data into said memory cell in this order.

9. The memory device with a function to perform an operation as set forth in claim 2, wherein said memory section has one or more word units each comprising a plurality of memory cells, and said operation and storage control section has operation units corresponding to, and in the same number of, said word units,

wherein said operation and storage control section controls each of said operation units to perform an operation on a plurality of memory cells of its corresponding word unit one by one.

10. The memory device with a function to perform an operation as forth in claim 9, wherein each of said operation units comprises:

a first hold circuit for temporarily holding said second data read out from a memory cell being processed;

an operation circuit for performing an operation on said first and second data read out from said memory cell; and

a second hold circuit for temporarily holding said first data read out from said memory cell or a result of said operation of said operation circuit, wherein said operation and storage control section makes a control to write said second data held in said first hold circuit into said memory cell in a non-volatile manner as new first data.

11. The memory device with a function to perform an operation as set forth in claim 2, wherein said memory cell comprises a ferroelectric capacitor and stores first data in a non-volatile manner according to a change in the polarization direction of said ferroelectric capacitor and second data in a volatile manner according to a change in the polarization state of said ferroelectric capacitor with no polarization reversal thereof.

12. The memory device with a function to perform an operation as set forth in claim 11, wherein said ferroelectric capacitor has a coercive voltage which is higher than a half of the source voltage of said memory device with a function to perform an operation and is lower than said source voltage.

13. The memory device with a function to perform an operation as set forth in claim 3, wherein said memory section has one or more word units each comprising a plurality of memory cells, and said operation and storage control section has operation units corresponding to, and in the same number of, said word units,

wherein said operation and storage control section controls each of said operation units to perform an operation on a plurality of memory cells of its corresponding word unit one by one.

14. The memory device with a function to perform an operation as forth in claim 13, wherein each of said operation units comprises:

a first hold circuit for temporarily holding said second data read out from a memory cell being processed;

an operation circuit for performing an operation on said first and second data read out from said memory cell; and

a second hold circuit for temporarily holding said first data read out from said memory cell or a result of said operation of said operation circuit, wherein said operation and storage control section makes a control to write said second data held in said first hold circuit into said memory cell in a non-volatile manner as new first data.

15. The memory device with a function to perform an operation as set forth in claim 3, wherein said memory cell comprises a ferroelectric capacitor and stores first data in a non-volatile manner according to a change in the polarization direction of said ferroelectric capacitor and second data in a volatile manner according to a change in the polarization state of said ferroelectric capacitor with no polarization reversal thereof.

16. The memory device with a function to perform an operation as set forth in claim 15, wherein said ferroelectric capacitor has a coercive voltage which is higher than a half of the source voltage of said memory device with a function to perform an operation and is lower than said source voltage.

17. The memory device with a function to perform an operation as set forth in claim 4, wherein said memory cell comprises a ferroelectric capacitor and stores first data in a non-volatile manner according to a change in the polarization direction of said ferroelectric capacitor and second data in a volatile manner according to a change in the polarization state of said ferroelectric capacitor with no polarization reversal thereof.

18. The memory device with a function to perform an operation as set forth in claim 5, wherein said memory cell comprises a ferroelectric capacitor and stores first data in a non-volatile manner according to a change in the polarization direction of said ferroelectric capacitor and second data in a volatile manner according to a change in the polarization state of said ferroelectric capacitor with no polarization reversal thereof.

19. A method of performing an operation on data and storing data using a memory section having a memory cell for storing first data in a non-volatile manner and second data in a volatile manner, comprising:

a step of reading out first and second data stored in said memory cell and performing an operation on said first and second data; and

a step of writing said read-out second data into said memory cell in a non-volatile manner as new first data.

20. The method of performing an operation and storage as set forth in claim 19, further comprising the step of writing the result of said operation into said memory cell in a volatile manner as new second data.