Method and apparatus for rapidly storing data in memory cell without voltage loss
First Claim
1. A semiconductor memory device comprising:
- a high voltage generating means for boosting an external voltage level and then for producing a first high voltage level;
a pumping control signal generating means for issuing a pumping control signal, which is activated in a restore section and a write section, in response to a command signal;
a pumping unit for outputting the first high voltage level from the high voltage generating means or for boosting the high voltage level in order to generate a second high voltage plus level in response to the pumping control signal from the pumping control signal generator, wherein the second high voltage plus level is higher than the first high voltage level; and
a word line driving means for driving the word line WL using the first high voltage level and for driving the word line WL using the second high voltage plus level from the pumping unit in the restore and write sections.
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Abstract
The present relates to a memory device; and, more particularly, to an apparatus and a method for preventing a loss of reliability of data, which are stored in memory cell, at the time of restoring and writing the data. The semiconductor memory device according to the present invention comprises: a high voltage generator for boosting an external voltage level and then for producing a first high voltage level; a pumping control signal generator for issuing a pumping control signal, which is activated in a restore section and a write section, in response to a command signal; a pumping unit for outputting the first high voltage level from the high voltage generator or for boosting the high voltage level in order to generate a second high voltage plus level in response to the pumping control signal from the pumping control signal generator, wherein the second high voltage plus level is higher than the first high voltage level; and a word line driver for driving the word line WL using the first high voltage level and for driving the word line WL using the second high voltage plus level from the pumping unit in the restore and write sections.
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Citations
22 Claims
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1. A semiconductor memory device comprising:
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a high voltage generating means for boosting an external voltage level and then for producing a first high voltage level;
a pumping control signal generating means for issuing a pumping control signal, which is activated in a restore section and a write section, in response to a command signal;
a pumping unit for outputting the first high voltage level from the high voltage generating means or for boosting the high voltage level in order to generate a second high voltage plus level in response to the pumping control signal from the pumping control signal generator, wherein the second high voltage plus level is higher than the first high voltage level; and
a word line driving means for driving the word line WL using the first high voltage level and for driving the word line WL using the second high voltage plus level from the pumping unit in the restore and write sections. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for driving a semiconductor memory device comprising the steps of:
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activating a word line in a first high voltage level in response to an active command and inducing a fine voltage of cell data on the bit line, wherein the first high voltage level is higher than an external voltage level;
amplifying the fine voltage on the bit line;
activating the word line in a second high voltage level and restoring the amplified voltage on the bit line, wherein the second high voltage level is higher than the first high voltage level; and
non-activating the word line in response to a precharge command and precharging the bit line.
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10. A method for driving a semiconductor memory device comprising the steps of:
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activating a word line in a first high voltage level in response to an active command and inducing a fine voltage of cell data on the bit line, wherein the first high voltage level is higher than an external voltage level;
amplifying the fine voltage on the bit line;
activating the word line in a second high voltage level and restoring the amplified voltage on the bit line, wherein the second high voltage level is higher than the first high voltage level; and
non-activating the word line in response to a precharge command and precharging the bit line. - View Dependent Claims (11)
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12. A semiconductor memory device comprising:
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a driving voltage generating means for producing a driving voltage level using an external voltage level;
a pumping control signal generating means for producing a pumping control signal, which is activated in a restore section and a write section, in response to a command signal;
a pumping means for transferring the driving voltage level from the driving voltage generating means or for boosting the external voltage level in order to output a high voltage level which is higher than the external voltage level; and
a bit line sense amplifier for receiving the external voltage level or the high voltage level from the pumping means and amplifying the bit line voltage of a selected memory cell. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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20. A method for driving a semiconductor memory device comprising the steps of:
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amplifying a voltage level corresponding to a cell data, which is induced on a bit line, using an external voltage level;
restoring the amplified voltage level on the bit line using a high voltage level, which is higher than the external voltage level; and
non-activating the word line and precharging the bit line.
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21. A method for driving a semiconductor memory device comprising the steps of:
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amplifying a voltage level corresponding to a cell data, which is induced on a bit line, using an external voltage level while a word line is activated by a first high voltage level;
applying a voltage level corresponding to an input data to the bit line in response to a write command and writing the amplified voltage level on the bit line while a word line is activated by a second high voltage level, wherein the second high voltage level is higher than the first high voltage level; and
non-activating the word line and precharging the bit line. - View Dependent Claims (22)
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Specification