STRUCTURE AND METHOD TO FABRICATE ULTRA-THIN Si CHANNEL DEVICES
First Claim
1. A method to fabricate ultra-thin Si channel devices comprising the steps of:
- providing a structure having at least one trench region that includes a recessed, deposited oxide fill material, said at least one trench region is located in a nitride pad layer, a thermally grown oxide pad layer, a top-Si-containing layer of an SOI substrate and a portion of a buried insulating layer of said SOI substrate;
removing said nitride pad layer to expose said thermally grown oxide pad layer; and
removing said exposed thermally grown oxide pad layer and a portion of said recessed, deposited oxide fill material utilizing a chemical oxide removal process, said chemical oxide removal process etches the thermally grown oxide at a faster rate than the recessed, deposited oxide to provide a silicon-on-insulator structure having an oxide filled trench isolation region comprising said recessed, deposited oxide that has a height that is above an upper surface of said top Si-containing layer and a sloping oxide structure, wherein no undercut regions are located beneath the top Si-containing layer.
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Accused Products
Abstract
A method for preventing polysilicon stringer formation under the active device area of an isolated ultra-thin Si channel device is provided. The method utilizes a chemical oxide removal (COR) processing step to prevent stinger formation, instead of a conventional wet etch process wherein a chemical etchant such as HF is employed. A silicon-on-insulator (SOI) structure is also provided. The structure includes at least a top Si-containing layer located on a buried insulating layer; and an oxide filled trench isolation region located in the top Si-containing layer and a portion of the buried insulating layer. No undercut regions are located beneath the top Si-containing layer.
140 Citations
27 Claims
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1. A method to fabricate ultra-thin Si channel devices comprising the steps of:
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providing a structure having at least one trench region that includes a recessed, deposited oxide fill material, said at least one trench region is located in a nitride pad layer, a thermally grown oxide pad layer, a top-Si-containing layer of an SOI substrate and a portion of a buried insulating layer of said SOI substrate;
removing said nitride pad layer to expose said thermally grown oxide pad layer; and
removing said exposed thermally grown oxide pad layer and a portion of said recessed, deposited oxide fill material utilizing a chemical oxide removal process, said chemical oxide removal process etches the thermally grown oxide at a faster rate than the recessed, deposited oxide to provide a silicon-on-insulator structure having an oxide filled trench isolation region comprising said recessed, deposited oxide that has a height that is above an upper surface of said top Si-containing layer and a sloping oxide structure, wherein no undercut regions are located beneath the top Si-containing layer. - View Dependent Claims (2, 3, 4, 5, 6, 11)
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7-10. -10. (Cancelled).
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12-20. -20. (Cancelled).
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21. A method to fabricate ultra-thin Si channel devices comprising the steps of:
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providing a structure having at least one trench region that includes a recessed, deposited oxide fill material, said at least one trench region is located in a nitride pad layer, a thermally grown oxide pad layer, a top-Si-containing layer of an SOI substrate and a portion of a buried insulating layer of said SOI substrate;
removing said nitride pad layer to expose said thermally grown oxide pad layer; and
removing said exposed thermally grown oxide pad layer and a portion of said recessed, deposited oxide fill material utilizing a chemical oxide removal process, said chemical oxide removal process etches the thermally grown oxide at a faster rate than the recessed, deposited oxide to provide a silicon-on-insulator structure having an oxide filled trench isolation region comprising said recessed, deposited oxide that has a height that is below an upper surface of said top Si-containing layer and a sloping oxide structure, wherein no undercut regions are located beneath the top Si-containing layer. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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Specification