Rectifier utilizing a grounded antenna

• US 20040245858A1
• Filed: 06/30/2004
• Published: 12/09/2004
• Est. Priority Date: 03/13/2002
• Status: Abandoned Application

• Current Assignee: Alan D. Devilbiss, Gary F. Derbenwick
• Original Assignee: Alan D. Devilbiss, Gary F. Derbenwick
• Inventors: Derbenwick, Gary F., Devilbiss, Alan D.
• Application Number:
  US10/880,892
• Publication Number:
  US 20040245858A1
• Time in Patent Office: Days
• US Class Current: 307/151
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0715 the arrangement including means to regulate power transfer to the integrated circuit
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/0775 arrangements for connecting the integrated circuit to the antenna

Abstract

A rectifier generates a rectified output and a dc power output. The rectifier has an antenna element, a tuning capacitor, a coupling capacitor, first and second rectifying diodes, and a storage capacitor. The antenna element and the tuning capacitor are coupled in parallel and grounded at one terminal. The first rectifying diode is grounded at its anode terminal and the storage capacitor is grounded at one terminal. The coupling capacitor is coupled between the ungrounded terminal of the antenna element and the cathode terminal of the first rectifying diode. The anode terminal of the second rectifying diode is coupled to the cathode terminal of the first rectifying diode. The cathode terminal of the second rectifying diode is coupled to the ungrounded terminal of the storage capacitor. The rectified output is generated between the rectifying diodes. The dc power output is generated between the second rectifying diode and the storage capacitor.

Claims

1. An electronic device comprising:

an integrated circuit chip having an integrated circuit, a chip ground, and a substrate with the integrated circuit on one surface of the substrate and the chip ground on another surface of the substrate; and

an antenna element formed upon substructure media, the antenna element connected between the integrated circuit and the chip ground.

2. The electronic device of claim 1 further comprising a tuning capacitor connected with the antenna element.

3. The electronic device of claim 2 wherein the tuning capacitor is formed upon the substructure media.

4. The electronic device of claim 3 wherein the tuning capacitor is formed of at least one electrically conductive layer on the substructure media.

5. The electronic device of claim 4 wherein the electrically conductive layer includes conductive ink.

6. The electronic device of claim 2 wherein the tuning capacitor is connected in parallel with the antenna element.

7. The electronic device of claim 2 wherein the tuning capacitor is connected in series with the antenna element.

8. The electronic device of claim 1 wherein the antenna element is formed of an electrically conductive layer on the substructure media.

9. The electronic device of claim 8 wherein the electrically conductive layer includes conductive ink.

10. The electronic device of claim 1 wherein the substructure media is print media.

11. The electronic device of claim 1 further including a high magnetic permeability layer to increase the inductance of the antenna element.

12. The electronic device of claim 1 wherein the substrate includes a back surface of the integrated circuit.

13. An electronic device comprising:

an integrated circuit chip having an integrated circuit including a bonding pad, a chip ground, and a substrate with the integrated circuit on one surface of the substrate and the chip ground on another surface of the substrate; and

an antenna element formed upon a substructure media, the antenna element having a first terminal connected to the bonding pad and a second terminal connected to the chip ground.

14. The electronic device of claim 13 further comprising a tuning capacitor coupled between the first terminal of the antenna element and ground.

15. The electronic device of claim 14 wherein the tuning capacitor is formed upon the substructure media.

16. The electronic device of claim 15 wherein the tuning capacitor is formed of at least one electrically conductive layer on the substructure media.

17. The electronic device of claim 16 wherein the electrically conductive layer includes conductive ink.

18. The electronic device of claim 13 wherein the antenna element is formed of an electrically conductive layer on the substructure media.

19. The electronic device of claim 18 wherein the electrically conductive layer includes conductive ink.

20. The electronic device of claim 13 wherein the substructure media is print media.

21. The electronic device of claim 13 further including a high magnetic permeability layer to increase the inductance of the antenna element.

22. The electronic device of claim 13 wherein the substrate includes a back surface of the integrated circuit.

23. An electronic device comprising:

an integrated circuit chip having an integrated circuit, a power output, and a substrate with the integrated circuit on one surface of the substrate and the power output on another surface of the substrate; and

an antenna element formed upon a substructure media, the antenna element connected between the integrated circuit and the power output.

24. The electronic device of claim 23 further including a tuning capacitor connected with the antenna element.

25. The electronic device of claim 24 wherein the tuning capacitor is formed upon the substructure media.

26. The electronic device of claim 25 wherein the tuning capacitor is formed of at least one electrically conductive layer on the substructure media.

27. The electronic device of claim 26 wherein the electrically conductive layer includes conductive ink.

28. The electronic device of claim 24 wherein the tuning capacitor is connected in parallel with the antenna element.

29. The electronic device of claim 24 wherein the tuning capacitor is connected in series with the antenna element.

30. The electronic device of claim 23 wherein the antenna element is formed of an electrically conductive layer on the substructure media.

31. The electronic device of claim 30 wherein the electrically conductive layer includes conductive ink.

32. The electronic device of claim 23 wherein the substructure media is print media.

33. The electronic device of claim 23 further including a high magnetic permeability layer to increase the inductance of the antenna element.

34. The electronic device of claim 23 wherein the substrate includes a back surface of the integrated circuit.

35. An electronic device comprising:

an integrated circuit chip having an integrated circuit including a bonding pad, a power output, and a substrate with the integrated circuit on one surface of the substrate and the power output on another surface of the substrate; and

an antenna element formed upon a substructure media, the antenna element having a first terminal connected to the bonding pad and a second terminal connected to the power output.

36. The electronic device of claim 35 further comprising a tuning capacitor coupled between the first terminal of the antenna element and the power output.

37. The electronic device of claim 36 wherein the tuning capacitor is formed upon the substructure media.

38. The electronic device of claim 37 wherein the tuning capacitor is formed of at least one electrically conductive layer on the substructure media.

39. The electronic device of claim 38 wherein the electrically conductive layer includes conductive ink.

40. The electronic device of claim 35 wherein the antenna element is formed of an electrically conductive layer on the substructure media.

41. The electronic device of claim 40 wherein the electrically conductive layer includes conductive ink.

42. The electronic device of claim 35 wherein the substructure media is print media.

43. The electronic device of claim 35 further including a high magnetic permeability layer to increase the inductance of the antenna element.

44. The electronic device of claim 35 wherein the substrate includes a back surface of the integrated circuit.