Integrated circuit, semiconductor device comprising the same, electronic device having the same, and driving method of the same

• US 20040246765A1
• Filed: 03/08/2004
• Published: 12/09/2004
• Est. Priority Date: 03/11/2003
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kato, Kiyoshi
• Granted Patent: US 7,541,614 B2
• Time in Patent Office: Days
• US Class Current: 365/149
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/7841 with floating body, e.g. programmable transistors
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H10B 12/00 Dynamic random access memory [DRAM] devices

Abstract

An integrated circuit mounting a DRAM which can realize high integration without complicated manufacturing steps. The integrated circuit according to the invention comprises a DRAM in which a plurality of memory cells each having a thin film transistor are disposed. The thin film transistor comprises an active layer including a channel forming region, and first and second electrodes overlapping with each other with the channel forming region interposed therebetween. By controlling a drain voltage of the thin film transistor according to data, it is determined whether to accumulate holes in the channel forming region or not, and data is read out by confirming whether or not holes are accumulated,.

Claims

1. An integrated circuit comprising a DRAM,

wherein the DRAM comprises a plurality of memory cells, each of said plurality of memory cells comprising a thin film transistor;

and

wherein the thin film transistor comprises an active layer, and first and second electrodes overlapping with each other with the active layer interposed therebetween.

2. An integrated circuit according to claim 1,

wherein said active layer includes a channel forming region;

wherein it is determined whether to accumulate holes or not in the channel forming region by controlling a drain voltage of the thin film transistor according to data; and

wherein the data is read out by confirming whether the holes are accumulated or not.

3. An integrated circuit according to claim 2, wherein it is confirmed whether the holes are accumulated or not by using a drain current or a threshold voltage of the thin film transistor.

4. An integrated circuit according to claim 1,

wherein the active layer includes a channel forming region;

wherein data is stored according to the amount of holes which are accumulated in the channel forming region; and

wherein the holes are accumulated in the channel forming region by impact ioniztaion.

5. An integrated circuit according to claim 4, wherein data which is stored in the memory cells is read out by using a drain current or a threshold voltage of the thin film transistor.

17. An electronic device having the integrated circuit according to claim 1, wherein said electronic device is selected from the group consisting of a video camera, a digital camera, a goggle display, a navigation system, a sound reproduction device, a notebook personal computer, a game machine, a portable information device, an image reproduction device.

6. An integrated circuit comprising a DRAM,

wherein the DRAM comprises a plurality of memory cells, each of said plurality of memory cells comprising a memory element;

wherein a thin film transistor comprises a first electrode, a second electrode, an active layer which includes a channel forming region, a first insulating layer, and a second insulating layer is used as the memory element;

wherein the first electrode overlaps with the active layer with the first insulating layer interposed therebetween;

wherein the second electrode overlaps with the active layer with the second insulating layer interposed therebetween; and

wherein the first and second electrodes overlap with each other with the channel forming region interposed inbetweem.

18. An electronic device having the integrated circuit according to claim 6, wherein said electronic device is selected from the group consisting of a video camera, a digital camera, a goggle display, a navigation system, a sound reproduction device, a notebook personal computer, a game machine, a portable information device, an image reproduction device.

7. An integrated circuit comprising a DRAM,

wherein the DRAM comprises a plurality of memory cells, each of said plurality of memory cells comprising a first thin film transistor and a second thin film transistor;

wherein the first thin film transistor comprises a first electrode, a second electrode, an active layer, a first insulating layer, and a second insulating layer;

wherein the active layer comprises a channel forming region, and source and drain regions interposing the channel forming region therebetween;

wherein the first electrode overlaps with the active layer with the first insulating layer interposed therebetween;

wherein the second electrode overlaps with the active layer with the second insulating layer interposed therebetween;

wherein the first and second electrodes overlap with each other with the channel forming region interposed therebetween; and

wherein potential supply to the drain region is controlled by the second thin film transistor.

8. An integrated circuit according to claim 7,

wherein the channel forming region includes a region which overlaps with both of the first and second electrodes, and a region which overlaps only with the second electrode;

and

wherein the overlapping region with the second electrode in the channel forming region is provided in a drain region side than the overlapping region with the first and second electrodes.

19. An electronic device having the integrated circuit according to claim 7, wherein said electronic device is selected from the group consisting of a video camera, a digital camera, a goggle display, a navigation system, a sound reproduction device, a notebook personal computer, a game machine, a portable information device, an image reproduction device.

9. An integrated circuit comprising,

a DRAM which comprises a plurality of memory cells, each of said plurality of memory cells comprising a thin film transistor comprising a first electrode, a second electrode, and an active layer including a channel forming region;

first means for controlling a drain voltage of the thin film transistor;

second means for controlling a potential of the first electrode; and

third means for confirming the amount of holes which are accumulated in the channel forming region,

wherein the first and second electrodes overlap with each other with the active layer interposed therebetween;

wherein data is written by controlling a cumulative amount of the holes using the first and second means; and

wherein the data is read out by confirming the cumulative amount of the holes using the third means.

10. An integrated circuit according to claim 9,

wherein the data has three states or more.

11. An integrated circuit according to claim 9, wherein the cumulative amount of the holes are confirmed by using a drain current of the thin film transistor, a threshold voltage of the thin film transistor, or a voltage between a source region and a drain region in the active layer.

20. An electronic device having the integrated circuit according to claim 9, wherein said electronic device is selected from the group consisting of a video camera, a digital camera, a goggle display, a navigation system, a sound reproduction device, a notebook personal computer, a game machine, a portable information device, an image reproduction device.

12. A semiconductor device comprising:

an integrated circuit which comprises a DRAM; and

a pixel portion which is controlled by the integrated circuit,

wherein the DRAM comprises a plurality of memory cells, each of said plurality of memory cells comprising a memory element;

wherein a second thin film transistor comprising a first electrode, a second electrode, an active layer including a channel forming region, a first insulating layer, and a second insulating layer is used as the memory element;

wherein the first electrode overlaps with the active layer with the first insulating layer interposed therebetween;

wherein the second electrode overlaps with the active layer with the second insulating layer interposed therebetween; and

wherein the first and second electrodes overlap with each other with the channel forming region interposed therebetween.

21. An electronic device having the semiconductor device according to claim 12, wherein said electronic device is selected from the group consisting of a video camera, a digital camera, a goggle display, a navigation system, a sound reproduction device, a notebook personal computer, a game machine, a portable information device, an image reproduction device.

13. A driving method of an integrated circuit,

wherein the integrated circuit comprises a DRAM which comprises a plurality of memory cells, each of said plurality of memory cells comprising a thin film transistor;

wherein the thin film transistor comprises an active layer including a channel forming region, and first and second gate electrodes overlapping with each other with the active layer interposed therebetween;

wherein data is written by controlling a potential of the second electrode to turn ON the thin film transistor, and controlling a drain voltage of the thin film transistor to accumulate holes in the channel forming region, thereby controlling the cumulative amount of the holes by using a potential of the first electrode; and

wherein the data is read out by using a drain current or a threshold voltage of the thin film transistor.

15. An integrated circuit according to claim 13,

wherein the thin film transistor further comprises a first electrode and a second electrode;

wherein the first electrode overlaps with the active layer with the first insulating layer interposed therebetween;

wherein the second electrode overlaps with the active layer with the second insulating layer interposed therebetween; and

wherein the first and second electrodes overlap with each other with the channel forming region interposed therebetween.

14. A driving method of an integrated circuit,

wherein the integrated circuit comprises a DRAM which comprises a plurality of memory cells, each of said plurality of memory cells comprising a thin film transistor;

wherein the thin film transistor comprises an active layer including a channel forming region, and first and second gate electrodes overlapping with each other with the active layer interposed therebetween;

wherein data having three states or more is written by controlling a potential of the second electrode to turn ON the thin film transistor, and controlling a drain voltage of the thin film transistor to accumulate holes in the channel forming region, thereby controlling the cumulative amount of the holes by using a potential of the first electrode; and

wherein the data is read out by using a drain current or a threshold voltage of the thin film transistor.

16. An integrated circuit according to claim 14,

wherein the thin film transistor comprises a first electrode and a second electrode;

wherein the first electrode overlaps with the active layer with the first insulating layer interposed therebetween;

wherein the second electrode overlaps with the active layer with the second insulating layer interposed therebetween; and

wherein the first and second electrodes overlap with each other with the channel forming region interposed therebetween.