Apparatus and method for monitoring high impedance failures in chip interconnects
First Claim
1. An apparatus for monitoring high impedance failures in system interconnects, comprising:
- monitoring circuitry located on a chip, comprising;
a resistance continuity monitoring circuit (RCMC), wherein the RCMC measures the resistance of a connection of a representative set of pins on the chip with a circuit board, outputting an analog measured resistance data;
a signal path connecting the representative set of pins to the RCMC; and
a system interface for connecting the RCMC with other system components;
wherein the monitoring circuitry converts the analog measured resistance data to digital resistance data and displays the digital resistance data on an output device.
4 Assignments
0 Petitions
Accused Products
Abstract
A method and corresponding apparatus for monitoring high impedance failures in chip interconnects use monitoring circuitry on a chip to provide accurate and pro-active prediction of interconnect failures. The apparatus may include a resistance continuity monitoring circuit (RCMC), and a signal path connecting a representative set of pins to the RCMC. The RCMC measures the resistance of a connection of the representative set of pins with a circuit board during system operation and outputs a measured resistance data. The apparatus further includes additional analog-to-digital (A/D) hardware to perform an analog to digital conversion of the measured resistance data. The apparatus further includes a system interface for connecting the monitoring circuitry with other system management devices. The method then performs an algorithm on the measured resistance data, potentially warning of likely interconnect failures. The algorithm may include comparing the measured resistance data with a known threshold resistance value. Alternatively, the method displays and logs the measured resistance data for further study and analysis.
-
Citations
20 Claims
-
1. An apparatus for monitoring high impedance failures in system interconnects, comprising:
-
monitoring circuitry located on a chip, comprising;
a resistance continuity monitoring circuit (RCMC), wherein the RCMC measures the resistance of a connection of a representative set of pins on the chip with a circuit board, outputting an analog measured resistance data;
a signal path connecting the representative set of pins to the RCMC; and
a system interface for connecting the RCMC with other system components;
wherein the monitoring circuitry converts the analog measured resistance data to digital resistance data and displays the digital resistance data on an output device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 13, 14, 15, 16, 17, 18)
-
-
11. A method for detecting high impedance failures in system interconnects, comprising steps of:
-
measuring the resistance of a connection of a representative set of pins on a chip to a circuit board using monitoring circuitry located on the chip, wherein the measuring step produces an analog measured resistance data;
converting the analog measured resistance data to digital resistance data;
displaying the digital resistance data on an output device; and
performing an algorithm on the digital resistance data. - View Dependent Claims (12)
-
-
19. A computer-readable medium comprising instructions for monitoring high impedance failures in system interconnects, the instructions comprising:
-
measuring the resistance of a connection of a representative set of pins on a chip to a circuit board using monitoring circuitry located on the chip, wherein the measuring step produces an analog measured resistance data;
converting the analog measured resistance data to digital resistance data;
displaying the digital resistance data on an output device; and
performing an algorithm on the digital resistance data. - View Dependent Claims (20)
-
Specification