Apparatus and method for coverage directed test

• US 20040249618A1
• Filed: 06/03/2003
• Published: 12/09/2004
• Est. Priority Date: 06/03/2003
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Levinger, Moshe, Fine, Shai, Ziv, Avi
• Granted Patent: US 7,181,376 B2
• Time in Patent Office: Days
• US Class Current: 703/2
• CPC Class Codes: G05B 23/0256 injecting test signals and analyzing monitored process response, e.g. injecting the test signal while interrupting the normal operation of the monitored system; superimposing the test signal onto a control signal during normal operation of the monitored system
• CPC Class Codes: G06F 11/261 by simulating additional hardware, e.g. fault simulation
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

A Bayesian network correlating coverage data and input data to a test verification system for coverage directed test generation (CDG) of a device under test. In one embodiment, the Bayesian network is part of a CDG engine which also includes a data analyzer which analyzes coverage data from a current test run of a test verification system and from previous test runs to determine which coverage events from a coverage model have occurred therein, at what frequency and which ones have not yet occurred, a coverage model listing coverage events which define the goal of the test verification system and a task manager coupled to the data analyzer and the Bayesian network which refers to the coverage model and queries the Bayesian network to produce input data to achieve desired coverage events.

Claims

1. A Bayesian network correlating coverage data and input data to a test verification system for coverage directed test generation (CDG) of a device under test.

2. The use of a Bayesian network in a test verification system for functional verification of a device under test.

3. A CDG engine comprising:

a data analyzer which analyzes coverage data from a current test run of a test verification system and from previous test runs to determine which coverage events from a coverage model have occurred therein, at what frequency and which ones have not yet occurred;

a coverage model listing coverage events which define the goal of the test verification system;

a Bayesian network which determines input data to said test verification system to achieve at least some of said coverage events; and

a task manager coupled to said data analyzer and said Bayesian network which refers to said coverage model and queries said Bayesian network to produce input data to achieve desired coverage events.

4. A CDG engine according to claim 3 and wherein said test verification system is a random test generator and a simulator simulating a device under test.

5. A CDG engine according to claim 3 and wherein said test verification system is a behavioral device that generates stimuli to a device under test.

6. A CDG engine according to claim 3 and wherein said test verification system is a simulator which implements a device under test.

7. A CDG engine according to claim 3 and wherein said test verification system is a hardware accelerator or an emulator that simulates a device under test.

8. A CDG engine according to claim 3 and wherein said test verification system is a simulation environment having a random test generator and/or a coverage analysis tool embedded therein.

9. A computer product readable by a machine, tangibly embodying a program of instructions executable by the machine to perform method steps for coverage directed test verification, said method comprising:

analyzing coverage data from a current test run of a test verification system and from previous test runs to determine which coverage events from a coverage model have occurred therein, at what frequency and which ones have not yet occurred;

having a coverage model listing coverage events which define the goal of the test verification system;

having Bayesian network which determines input data to said test verification system to achieve at least some of said coverage events; and

querying said Bayesian network to produce input data to achieve desired coverage events.

10. The product according to claim 9 and wherein said test verification system is a random test generator and a simulator simulating a device under test.

11. The product according to claim 9 and wherein said test verification system is a behavioral device that generates stimuli to a device under test.

12. The product according to claim 9 and wherein said test verification system is a simulator which implements a device under test.

13. The product according to claim 9 and wherein said test verification system is a hardware accelerator or an emulator that simulates a device under test.

14. The product according to claim 9 and wherein said test verification system is a simulation environment having a random test generator and/or a coverage analysis tool embedded therein.

15. A method for coverage directed test verification comprising:

analyzing coverage data from a current test run of a test verification system and from previous test runs to determine which coverage events from a coverage model have occurred therein, at what frequency and which ones have not yet occurred;

having a coverage model listing coverage events which define the goal of the test verification system;

having Bayesian network which determines input data to said test verification system to achieve at least some of said coverage events; and

querying said Bayesian network to produce input data to achieve desired coverage events.