Data transmission device and data reception device

• US 20040252235A1
• Filed: 02/04/2004
• Published: 12/16/2004
• Est. Priority Date: 06/12/2002
• Status: Active Grant

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Ejima, Naoki
• Granted Patent: US 7,855,751 B2
• Time in Patent Office: Days
• US Class Current: 348/515
• CPC Class Codes: H04H 20/28 Arrangements for simultaneous broadcast of plural pieces of information
• CPC Class Codes: H04N 21/4305 Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 21/43632 involving a wired protocol, e.g. IEEE 1394 high-speed IEEE 1394 serial bus H04L12/40052
• CPC Class Codes: H04N 5/04 Synchronising for television systems using pulse code modulation H04N7/56
• CPC Class Codes: H04N 5/126 whereby the synchronisation signal indirectly commands a frequency generator
• CPC Class Codes: H04N 5/602 for digital sound signals
• CPC Class Codes: H04N 7/083 with signal insertion during the vertical and the horizontal blanking interval , e.g. MAC data signals
• CPC Class Codes: H04N 9/641 Multi-purpose receivers, e.g. for auxiliary information H04N9/642 takes precedence

Abstract

As shown in FIG. 7, a data receiver receives video data and audio data together with a frequency division parameter N that depends on the pixel clock of the video data and the sampling frequency of the audio data, and a count value CTS that is obtained by counting the period of the audio clock that has been subjected to frequency division by the frequency division parameter N, with the pixel clock, which are transmitted from a data transmitter, and subjects the pixel clock to frequency division by the count value CTS, phase-control the divided clock (s501) in accordance with a phase comparison clock (s505) that is obtained by dividing an audio clock (s403) oscillated from a VCO (504) by the frequency division parameter N, thereby generating an audio clock (s403).

Accordingly, the data transmitter and the data receiver can satisfactorily implement multiplexing of audio data and video data, and transmission of the multiplexed data using an existing DVI cable, with a simple structure.

Claims

1. A data transmitter that transmits video/audio data through a digital display connecting interface, including:

a data processing unit for processing audio data to output transmission audio data; and

a data superimposing unit for superimposing the transmission audio data upon video data to output video/audio data,

said data processing unit including,

a frequency dividing means for frequency dividing an audio clock as a reference clock for the audio data using a predetermined frequency division parameter N, to generate a transmission audio clock having a period that is N times longer than the audio clock; and

a count means for counting the period of the transmission audio clock generated by the frequency dividing means with utilizing a pixel clock as a reference clock for the video data to output the count value CTS, and

generating the transmission audio data by adding additional information including the frequency division parameter N and the count value CTS to the audio data, and

said transmission audio clock being a clock having a frequency of 300 Hz or higher.

2. A data transmitter that transmits video/audio data through a digital display connecting interface, including:

a data processing unit for processing audio data to output transmission audio data; and

a data superimposing unit for superimposing the transmission audio data upon video data to output video/audio data,

said data processing unit including,

a frequency dividing means for frequency dividing an audio clock as a reference clock for the audio data using a predetermined frequency division parameter N, to generate a transmission audio clock having a period that is N times longer than the audio clock; and

a count means for counting the period of the transmission audio clock that has been generated by the frequency dividing means with utilizing a pixel clock as a reference clock for the video data to output the count value CTS, and

generating the transmission audio data by adding additional information including the frequency division parameter N and the count value CTS to the audio data, and

said transmission audio clock being a clock having a frequency of 3000 Hz or lower.

3. A data transmitter that transmits video/audio data through a digital display connecting interface, including:

a data processing unit for processing audio data to output transmission audio data; and

a data superimposing unit for superimposing the transmission audio data upon video data to output video/audio data,

said data processing unit including,

a frequency dividing means for frequency dividing an audio clock as a reference clock for the audio data using a predetermined frequency division parameter N, to generate a transmission audio clock having a period that is N times longer than the audio clock; and

a count means for counting the period of the transmission audio clock that has been generated by the frequency dividing means with utilizing a pixel clock as a reference clock for the video data to output the count value CTS, and

generating the transmission audio data by adding additional information including the frequency division parameter N and the count value CTS to the audio data, and

said transmission audio clock being a clock having a frequency that is 300 Hz or higher, and 3000 Hz or lower.

4. The data transmitter of claim 3 wherein

when the pixel clock is 25.2/1.001 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 8(a).

5. The data transmitter of claim 3 wherein

when the pixel clock is 25.2/1.001 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 8(b).

6. The data transmitter of claim 3 wherein

when the pixel clock is 25.2/1.001 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 8(c).

7. The data transmitter of claim 3 wherein

when the pixel clock is 25.2 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 9.

8. The data transmitter of claim 3 wherein

when the pixel clock is 25.2 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIGS. 10, 11, 12, 13, 14 and 15(a).

9. The data transmitter of claim 3 wherein

when the pixel clock is 25.2 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIGS. 15(b) and 16.

10. The data transmitter of claim 3 wherein

when the pixel clock is 27 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 17(a).

11. The data transmitter of claim 3 wherein

when the pixel clock is 27 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 17(b).

12. The data transmitter of claim 3 wherein

when the pixel clock is 27 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 18.

13. The data transmitter of claim 3 wherein

when the pixel clock is 27×

1.001 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 19(a).

14. The data transmitter of claim 3 wherein

when the pixel clock is 27×

1.001 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 19(b).

15. The data transmitter of claim 3 wherein

when the pixel clock is 27×

1.001 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 19(c).

16. The data transmitter of claim 3 wherein

when the pixel clock is 54.0 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 20(a).

17. The data transmitter of claim 3 wherein

when the pixel clock is 54.0 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIGS. 20(b) and 21(a).

18. The data transmitter of claim 3 wherein

when the pixel clock is 54.0 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIGS. 21(b) and 22.

19. The data transmitter of claim 3 wherein

when the pixel clock is 74.25/1.001 MHz and the data sampling frequency of audio data is 32 kHz, the relationship between the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) is N=11648 and 210937≦

CTS≦

210938.

20. The data transmitter of claim 3 wherein

when the pixel clock is 74.25/1.001 MHz and the data sampling frequency of audio data is 44.1 kHz, the relationship between the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) is N=17836 and CTS=234375.

21. The data transmitter of claim 3 wherein

when the pixel clock is 74.25/1.001 MHz and the data sampling frequency of audio data is 48 kHz, the relationship between the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) is N=11648 and CTS=140625.

22. The data transmitter of claim 3 wherein

when the pixel clock is 74.25 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 24(a).

23. The data transmitter of claim 3 wherein

when the pixel clock is 74.25 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 24(b).

24. The data transmitter of claim 3 wherein

when the pixel clock is 74.25 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 24(c).

25. The data transmitter of claim 3 wherein

when the pixel clock is 148.5/1.001 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 25(a).

26. The data transmitter of claim 3 wherein

when the pixel clock is 148.5/1.001 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 25(b).

27. The data transmitter of claim 3 wherein

when the pixel clock is 148.5/1.001 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 25(c).

28. The data transmitter of claim 3 wherein

when the pixel clock is 148.5 MHz and the data sampling frequency of audio data is 32 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 26(a).

29. The data transmitter of claim 3 wherein

when the pixel clock is 148.5 MHz and the data sampling frequency of audio data is 44.1 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 26(b).

30. The data transmitter of claim 3 wherein

when the pixel clock is 148.5 MHz and the data sampling frequency of audio data is 48 kHz, the frequency division parameter N (N is an integer) and the count value CTS (CTS is an integer) have a relationship as shown in FIG. 26(c).

31. A data receiver that receives video/audio data through a digital display connecting interface, including:

a video/audio data separating unit for separating video data and transmission audio data from the video/audio data; and

an audio clock generating unit for generating an audio clock as a reference clock for audio data, on the basis of a pixel clock as a reference clock for the video data and a frequency division parameter N that has been added to the transmission audio data,

said audio clock generating unit including;

an oscillator that oscillates the audio clock in accordance with a control signal;

a frequency dividing means for frequency dividing the pixel clock using a count value CTS included in the transmission audio data to generate a frequency division clock having a period that is CTS times longer than the pixel clock; and

a phase control means for controlling the oscillator in accordance with the control signal that is generated on the basis of a difference in phase between the frequency division clock and a phase comparison clock that is obtained by dividing the audio clock by a frequency division parameter N.

32. The data receiver of claim 31 wherein

the phase control means controls the oscillator on the basis of a difference in phase between the frequency division clock that is generated by the frequency dividing means and the phase comparison clock having a frequency that is nearest to 1000 Hz.

33. The data receiver of claim 31 wherein

when the sampling frequency for the audio data is 44.1 kHz, the phase control means controls the oscillator on the basis of a difference in phase between the frequency division clock that is generated by the frequency dividing means, and the phase comparison clock having a frequency that is nearest to 900 Hz.

34. The data receiver of claim 31 wherein

when the data sampling frequency of the audio data is 32 kHz or 48 kHz, and the pixel clock has a frequency other than 25.2/1.001 MHz, 25.022 MHz, 27.000 MHz, 27.0×

1.001 MHz, 54.000 MHz, 74.25/1.001 MHz, 74.25 MHz, 148.5/1.001 MHz, and 148.5 MHz,

the frequency division parameter N (N is an integer) is decided such that the phase comparison clock that is obtained by dividing the pixel clock by the frequency division parameter N has a frequency nearest to 1000 Hz.

35. The data receiver of claim 31 wherein

when the data sampling frequency of the audio data is 44.1 kHz, and the pixel clock has a frequency other than 25.2/1.001 MHz, 25.022 MHz, 27.000 MHz, 27.0×

1.001 MHz, 54.000 MHz, 74.25/1.001 MHz, 74.25 MHz, 148.5/1.001 MHz, and 148.5 MHz,

the frequency division parameter N (N is an integer) is decided such that the phase comparison clock that is obtained by dividing the pixel clock by the frequency division parameter N has a frequency that is the nearest to 900 Hz.