Systems, processes and integrated circuits for rate and/or diversity adaptation for packet communications

• US 20040252701A1
• Filed: 03/31/2004
• Published: 12/16/2004
• Est. Priority Date: 12/14/1999
• Status: Active Grant

• Current Assignee: Alan V Mccree, Krishnasamy Anandakumar, Vishu R. Viswanathan
• Original Assignee: Alan V Mccree, Krishnasamy Anandakumar, Vishu R. Viswanathan
• Inventors: Viswanathan, Vishu R., McCree, Alan V., Anandakumar, Krishnasamy
• Granted Patent: US 7,606,164 B2
• Time in Patent Office: Days
• US Class Current: 370/395.21
• CPC Class Codes: H04B 7/06 at the transmitting station
• CPC Class Codes: H04L 43/0829 Packet loss
• CPC Class Codes: H04L 65/1101 Session protocols
• CPC Class Codes: H04L 65/65 Network streaming protocols, e.g. real-time transport protocol [RTP] or real-time control protocol [RTCP]
• CPC Class Codes: H04L 65/752 adapting media to network capabilities
• CPC Class Codes: H04L 65/80 Responding to QoS
• CPC Class Codes: H04W 24/00 Supervisory, monitoring or testing arrangements
• CPC Class Codes: H04W 24/08 Testing, supervising or monitoring using real traffic
• CPC Class Codes: H04W 28/22 Negotiating communication rate
• CPC Class Codes: H04W 28/24 Negotiating SLA [Service Level Agreement]; Negotiating QoS [Quality of Service]

Abstract

A process (111,101) of sending packets of real-time information at a sender (311) includes initially generating packets of real-time information with a source rate (s11) greater than zero kilobits per second, and a time or path or combined time/path diversity rate (d11) initially being at least zero kilobits per second. Sending the packets results in a quality of service QoS, optionally measured at the sender (311). Rate/diversity adaptation decision may be performed at receiver (361′) instead. When the QoS is on an unacceptable side of a threshold of acceptability (Th1), the sender increases the diversity rate (d11 to d22) and sends not only additional ones of the packets of real-time information but also sends diversity packets at the increased diversity rate (d22). Increasing the diversity rate (d11 to d22) while either reducing or maintaining the overall transmission rate (sij+dij) is an important new improvement.

Claims

1. A process of sending packets of real-time information comprising the steps of:

initially generating at a sender the packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

sending the packets, thereby resulting in a quality of service QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS is on an unacceptable side of said threshold increasing the diversity rate and sending not only additional ones of the packets of real-time information but also sending diversity packets at the diversity rate as increased.

2. The process of claim 1 including generating a report of QoS at a receiver and sending the report of QoS to the sender.

3. The process of claim 1 wherein the comparing step includes comparing the QoS with a threshold of acceptability at the sender.

4. The process of claim 1 including generating a report of QoS at a receiver, wherein the comparing step includes comparing the QoS with a threshold of acceptability at the receiver.

5. The process of claim 1 wherein the comparing step includes comparing the QoS with a threshold of acceptability at the receiver.

6. The process of claim 1 further comprising comparing the QoS with a second threshold of acceptability;

and

when the QoS is on an unacceptable side of said first-named threshold and said second threshold, sending packets with a different combination of source rate and diversity rate than when the QoS is on an unacceptable side of said first-named threshold and but not on an unacceptable side of said second threshold.

7. The process of claim 1 further comprising

comparing the QoS with a second threshold of acceptability;

and

when the QoS is on an unacceptable side of said first-named threshold and said second threshold, sending packets with more stages of diversity than when the QoS is on an unacceptable side of said first-named threshold and but not on an unacceptable side of said second threshold.

8. The process of claim 1 further comprising

comparing the QoS with a second threshold of acceptability;

and

when the QoS is on an unacceptable side of said first-named threshold and said second threshold, sending packets with lower overall transmission rate than when the QoS is on an unacceptable side of said first-named threshold and but not on an unacceptable side of said second threshold.

9. The process of claim 1 wherein the step of sending additional packets and diversity packets includes decreasing the source rate compared to the source rate in the initial generating step.

10. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as time-diversity packets.

11. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as media-specific time-diversity packets.

12. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as Important-Information-based time-diversity packets.

13. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as forward error correction time-diversity packets.

14. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as multiple description coding time-diversity packets.

15. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as multiple description data partitioning time-diversity packets.

16. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets as path-diversity packets.

17. The process of claim 1 wherein the step of sending additional packets and diversity packets includes sending the diversity packets with combined time-and-path diversity.

18. The process of claim 1 wherein the comparing step is executed at a receiver computer, and the process further comprising of sending additional packets and diversity packets includes sending the diversity packets with combined time-and-path diversity.

19. The process of claim 1 wherein the diversity packets include path diversity packets.

20. The process of claim 1 wherein the additional packets have a second source rate, and the second source rate plus the diversity rate as increased are in sum less than the source rate initially plus the diversity rate initially.

21. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then further increasing the diversity.

22. The process of claim 1 wherein when the QoS persists on an unacceptable side of said threshold then initiating second diversity packets with a second diversity rate.

23. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then initiating second diversity packets with a second diversity rate.

24. The process of claim 1 wherein the diversity packets include time diversity packets and further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then initiating second time diversity packets with a second diversity rate.

25. The process of claim 1 wherein the diversity packets include time diversity packets and further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then initiating path diversity packets with a second diversity rate.

26. The process of claim 1 wherein the diversity packets include path diversity packets and further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then initiating time diversity packets with a second diversity rate.

27. The process of claim 1 wherein the diversity packets include path diversity packets and further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then initiating second path diversity packets with a second diversity rate.

28. The process of claim 27 wherein when the QoS persists on an unacceptable side of said threshold then also decreasing the overall transmission rate of the packets.

29. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS persists on an unacceptable side of said threshold then decreasing the overall transmission rate of the packets.

30. The process of claim 1 wherein when the QoS returns to an acceptable side of said threshold then increasing the source rate of the additional packets.

31. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS returns to an acceptable side of said threshold then increasing the source rate of the additional packets.

32. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS returns to an acceptable side of said threshold then decreasing the diversity rate of the diversity packets.

33. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS returns to an acceptable side of said threshold then decreasing the diversity rate of the diversity packets, and when the QoS remains on an acceptable side of said threshold, then further increasing the source rate.

34. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS passes beyond a second threshold of more acceptability of QoS than the first-mentioned threshold, then increasing the source rate of the additional packets.

35. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS passes beyond a second threshold of more acceptability of QoS than the first-mentioned threshold, then increasing the source rate of the additional packets, and when the QoS remains on an acceptable side of said threshold, then further increasing the source rate.

36. The process of claim 1 further comprising the step of repeatedly performing the obtaining step and comparing step, and when the QoS passes beyond a second threshold of more acceptability of QoS than the first-mentioned threshold, then increasing the source rate of the additional packets, and when the QoS remains on an acceptable side of said threshold, then decreasing the diversity rate of the diversity packets.

37. The process of claim 1 wherein when the QoS at least reaches a second threshold of more acceptability of QoS than the first-mentioned threshold, then decreasing the diversity rate of the diversity packets.

38. The process of claim 1 wherein the sending step operates at an old steady state overall transmission rate, and when the QoS substantially changes, selecting a new steady state overall transmission rate from available network resources.

39. The process of claim 1 further comprising replicating the sending, comparing and increasing steps for packet broadcasting to multiple destinations.

40. A process of sending packets of real-time information comprising the steps of:

initially generating at the sender the packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets, thereby resulting in a quality of service QoS;

obtaining a measure-of the QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS reaches or exceeds the acceptable side of said threshold, then decreasing the diversity rate.

41. The process of claim 40 wherein the sending step has a current overall transmission rate and the process further comprises maintaining the overall transmission rate less than or substantial equally to the current overall transmission rate when the diversity rate is decreased as aforesaid.

42. The process of claim 40 wherein the diversity packets include time-diversity packets.

43. The process of claim 40 wherein the diversity packets include media-specific time-diversity packets.

44. The process of claim 40 wherein diversity packets include Important-Information-based time-diversity packets.

45. The process of claim 40 wherein the diversity packets include CELP-based Important-Information-based time-diversity packets.

46. The process of claim 40 wherein diversity packets include multiple description coding time-diversity packets.

47. The process of claim 40 wherein the diversity packets include multiple description data partitioning time-diversity packets.

48. The process of claim 40 wherein the step of sending packets and diversity packets includes sending the diversity packets with combined time-and-path diversity.

49. The process of claim 40 wherein the comparing step is executed at a receiver computer, and the process further comprising of sending additional packets and diversity packets includes sending the diversity packets with combined time-and-path diversity.

50. The process of claim 40 wherein the diversity packets include path diversity packets.

51. The process of claim 40 wherein when the QoS reaches or exceeds the acceptable side of said threshold then also decreasing the diversity rate.

52. The process of claim 40 wherein when the QoS reaches or exceeds the acceptable side of said threshold then also selecting a new steady state overall transmission rate from available network resources and increasing the overall transmission rate if new steady state overall transmission rate is larger than the current overall transmission rate.

53. The process of claim 40 wherein the initial generating step includes further initially generating at the sender second diversity packets at a second diversity rate, and when the QoS reaches or exceeds the acceptable side of said threshold then terminating the second diversity packets.

54. The process of claim 40 wherein the diversity packets include time diversity packets and the initial generating step includes further initially generating at the sender path diversity packets at a second diversity rate, and when the QoS reaches or exceeds the acceptable side of said threshold then terminating the path diversity packets.

55. The process of claim 40 wherein the diversity packets include path diversity packets and the initial generating step includes further initially generating at the sender time diversity packets at a second diversity rate, and when the QoS reaches or exceeds the acceptable side of said threshold then terminating the time diversity packets.

56. The process of claim 40 further comprising replicating the sending, comparing and decreasing steps for packet broadcasting to multiple destinations.

57. A process of sending packets of real-time information comprising the steps of:

initially generating at the sender the packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets at an overall transmission rate, thereby resulting in a quality of service QoS;

obtaining a measure of the QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS reaches or exceeds the acceptable side of said threshold then increasing the overall transmission rate while substantially maintaining the diversity.

58. A process of sending packets of real-time information comprising the steps of:

initially generating at the sender the packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets with a current overall transmission rate;

obtaining a ratio of estimated steady state overall transmission rate to current overall transmission rate;

comparing the ratio with a threshold of acceptability; and

when the ratio is on an acceptable side of said threshold then increasing the overall transmission rate.

59. The process of claim 58 wherein when the ratio is not on the acceptable side of said threshold, to increase the overall transmission rate by an amount less than the overall transmission rate is increased when the ratio is on the acceptable side of said threshold.

60. A single-chip integrated circuit comprising:

a processor circuit; and

a rate-and-diversity control.

61. The single-chip integrated circuit of claim 60 wherein the rate-and-diversity control includes an adaptation state machine and an add-diversity control.

62. The single-chip integrated circuit of claim 60 further comprising a speech encoder controlled by said rate-and-diversity control.

63. The single-chip integrated circuit of claim 60 wherein said speech encoder produces frames of encoded speech and said integrated circuit further comprises a packetizer responsive to the frames to output packets including at least one of said frames in a packet.

64. The single-chip integrated circuit of claim 60 wherein said processor circuit comprises a digital signal processor multiplier and arithmetic logic unit.

65. The single-chip integrated circuit of claim 60 further comprising a non-volatile memory storing instructions establishing said rate-and-diversity control for execution by said processor circuit.

66. The single-chip integrated circuit of claim 60 further comprising a non-volatile memory storing instructions establishing both a speech encoder and said rate-and-diversity control for execution by said processor so that said speech encoder is controlled by said rate-and-diversity control.

67. A single-chip integrated circuit comprising processor circuitry and memory circuitry holding instructions defining sending of packets of real-time information from the integrated circuit by initially generating at the integrated circuit the packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

sending the packets, thereby resulting in a quality of service QoS;

obtaining at the integrated circuit a measure of the QoS and comparing the QoS with a threshold of acceptability, and when the QoS is on an unacceptable side of said threshold increasing the diversity rate and sending not only additional ones of the packets of real-time information but also sending diversity packets at the diversity rate as increased.

68. A single-chip integrated circuit comprising processor circuitry and memory circuitry holding instructions defining sending of packets of real-time information from the integrated circuit by initially generating packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets, thereby resulting in a quality of service QoS;

obtaining at the sender a measure of the QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS reaches or exceeds the acceptable side of said threshold then decreasing the diversity rate.

69. A wireless telephone comprising an antenna, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the antenna, said at least one integrated circuit assembly providing voice over packet transmissions and including a rate-and-diversity control of packets and diversity packets.

70. The wireless telephone of claim 69 further comprising a speech encoder controlled by said rate-and-diversity control.

71. The wireless telephone of claim 70 wherein said speech encoder produces frames of encoded speech and said integrated circuit assembly further comprises a packetizer responsive to the frames to output packets including at least one of said frames in a packet.

72. The wireless telephone of claim 69 wherein said integrated circuit assembly comprises a digital signal processor and said rate-and-diversity control comprises a block of software instructions executable by said digital signal processor.

73. The wireless telephone of claim 69 wherein said integrated circuit assembly comprises processor circuitry and a non-volatile memory storing instructions establishing said rate-and-diversity control for execution by said processor circuitry.

74. The wireless telephone single-chip integrated circuit of claim 69 further comprising a non-volatile memory storing instructions establishing both a speech encoder and said rate-and-diversity control for execution by said processor so that said speech encoder is controlled by said rate-and-diversity control.

75. A single-chip integrated circuit comprising:

a rate-and-diversity control; and

a QoS depacketizer coupled to said rate-and-diversity control.

76. The single-chip integrated circuit of claim 75 further comprising a delay-jitter handler;

and a reception-QoS packetizer.

77. The single-chip integrated circuit of claim 75 further comprising a delay-jitter handler;

and a lost packet compensator.

78. A wireless telephone comprising an antenna, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the antenna, said at least one integrated circuit assembly providing voice over packet transmissions and-including a rate-and-diversity control of packets and diversity packets and a QoS depacketizer coupled to said rate-and-diversity control.

79. The wireless telephone of claim 78 wherein the integrated circuit assembly further comprises a delay-jitter handler and a reception-QoS packetizer fed by said delay-jitter handler.

80. The wireless telephone of claim 78 wherein the integrated circuit assembly further comprises a delay-jitter handler;

and a lost packet compensator fed by said delay-jitter handler.

81. The wireless telephone of claim 78 wherein the integrated circuit assembly further comprises a delay-jitter handler;

a reception-QoS packetizer and a lost packet compensator wherein both the latter are coupled to said delay-jitter handler.

82. The wireless telephone of claim 81 wherein the integrated circuit assembly further comprises a vocoder coupled to the voice transducer and to said rate-and-diversity control and said lost packet compensator.

83. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information comprising a rate-and-diversity control.

84. The information storage article of manufacture of claim 83 wherein said bits of information further comprise a speech encoder controllable by said rate-and-diversity control.

85. The information storage article of manufacture of claim 83 wherein said bits of information further comprise instructions for a digital signal processor.

86. The information storage article of manufacture of claim 83 wherein said bits of information further comprise instructions defining sending of packets of real-time information by initially generating the packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

sending the packets, thereby resulting in a quality of service QoS;

obtaining at the integrated circuit a measure of the QoS and comparing the QoS with a threshold of acceptability, and when the QoS is on an unacceptable side of said threshold increasing the diversity rate and sending not only additional ones of the packets of real-time information but also sending diversity packets at the diversity rate as increased.

87. The information storage article of manufacture of claim 83 wherein said bits of information further comprise instructions defining sending of packets of real-time information from the integrated circuit by initially generating packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets, thereby resulting in a quality of service QoS;

obtaining at the sender a measure of the QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS reaches or exceeds the acceptable side of said threshold then decreasing the diversity rate.

88. The information storage article of manufacture of claim 83 wherein said bits of information further comprise a QoS depacketizer coupled to said rate-and-diversity control.

89. The information storage article of manufacture of claim 83 wherein said bits of information further comprise a delay-jitter handler and a reception-QoS packetizer.

90. The information storage article of manufacture of claim 83 wherein said bits of information further comprise a delay-jitter handler and a lost packet compensator.

91. The information storage article of manufacture of claim 90 wherein said bits of information further comprise a vocoder coupled to said rate-and-diversity control and said lost packet compensator.

92. The information storage article of manufacture of claim 83 further comprising hard disk drive control circuitry assembly and said storage medium including a rotatable hard disk controlled and read by said hard disk drive control circuitry assembly.

93. The information storage article of manufacture of claim 83 wherein said storage medium includes an optically readable surface.

94. The information storage article of manufacture of claim 83 wherein said storage medium includes a magnetically readable surface.

95. The information storage article of manufacture of claim 83 wherein said storage medium includes an integrated circuit memory.

96. A media over packet networking appliance comprising:

a network interface;

a voice transducer; and

at least one integrated circuit assembly coupling the voice transducer to the network interface, said at least one integrated circuit assembly providing media over packet transmissions and including a rate-and-diversity control of media packets and diversity packets.

97. The media over packet networking appliance of claim 96 further comprising a speech codec controlled by said rate-and-diversity control.

98. The media over packet networking appliance of claim 97 wherein said speech codec produces frames of encoded speech and said integrated circuit assembly further comprises a packetizer responsive to the frames to output packets including at least one of said frames in a packet.

99. The media over packet networking appliance of claim 96 wherein said integrated circuit assembly comprises a digital signal processor and said rate-and-diversity control comprises a block of software instructions executable by said digital signal processor.

100. The media over packet networking appliance of claim 96 wherein said integrated circuit assembly comprises processor circuitry and a non-volatile memory storing instructions establishing said rate-and-diversity control for execution by said processor circuitry.

101. The media over packet networking appliance of claim 96 wherein said at least one integrated circuit assembly further includes a QoS depacketizer coupled to said rate-and-diversity control.

102. The media over packet networking appliance of claim 96 wherein the integrated circuit assembly further comprises a delay-jitter handler and a reception-QoS packetizer fed by said delay-jitter handler.

103. The media over packet networking appliance of claim 96 wherein the integrated circuit assembly further comprises a delay-jitter handler;

and a lost packet compensator fed by said delay-jitter handler.

104. The media over packet networking appliance of claim 96 wherein the integrated circuit assembly further comprises a delay-jitter handler;

a reception-QoS packetizer and a lost packet compensator wherein both the latter are coupled to said delayjitter handler.

105. The media over packet networking appliance of claim 96 wherein the integrated circuit assembly further comprises a vocoder coupled to the voice transducer and to said rate-and-diversity control and said lost packet compensator.

106. The media over packet networking appliance of claim 96 further comprising a mobile enclosure holding a user interface coupled to said integrated circuit assembly.

107. The media over packet networking appliance of claim 96 further comprising a wireless interface unit coupled to said integrated circuit assembly.

108. The media over packet networking appliance of claim 96 further comprising a modem coupled to said integrated circuit assembly.

109. The media over packet networking appliance of claim 96 further comprising a wearable mobile enclosure holding a user interface coupled to said integrated circuit assembly.

110. The media over packet networking appliance of claim 96 further comprising a home appliance enclosure holding a user interface coupled to said integrated circuit assembly.

111. The media over packet networking appliance of claim 96 further comprising an automotive accessory enclosure holding a user interface coupled to said integrated circuit assembly.

112. The media over packet networking appliance of claim 96 further comprising a compressed-image packet interface coupled to said integrated circuit assembly and an image display coupled to said integrated circuit assembly.

113. A computer comprising

A network interface;

an audio reception transducer;

an audio emission transducer; and

at least one integrated circuit assembly coupling the audio reception transducer and audio emission transducer to the network interface, said at least one integrated circuit assembly providing audio over packet transmission and reception and including a rate-and-diversity control of audio packets and diversity packets.

114. The computer of claim 113 further comprising an audio codec controlled by said rate-and-diversity control.

115. The computer of claim 113 wherein said audio codec produces and receives frames of encoded audio and said integrated circuit assembly further comprises a packetizer and depacketizer responsive to the frames to output and receive packets including at least one frames in a packet.

116. The computer of claim 113 wherein said integrated circuit assembly comprises a digital signal processor.

117. The computer of claim 116 wherein said integrated circuit assembly further comprises a non-volatile memory storing instructions establishing said rate-and-diversity control for execution by said digital signal processor.

118. The computer of claim 113 wherein said integrated circuit assembly further comprises processor circuitry and memory circuitry holding instructions defining sending of packets of real-time information from the computer by initially generating at the computer the packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

sending the packets, thereby resulting in a quality of service QoS;

obtaining at the integrated circuit a measure of the QoS and comparing the QoS with a threshold of acceptability, and when the QoS is on an unacceptable side of said threshold increasing the diversity rate and sending not only additional ones of the packets of real-time information but also sending diversity packets at the diversity rate as increased.

119. The computer of claim 113 wherein said integrated circuit assembly further comprises processor circuitry and memory circuitry holding instructions defining sending of packets of real-time information from the computer by initially generating packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets, thereby resulting in a quality of service QoS;

obtaining at the computer a measure of the QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS reaches or exceeds the acceptable side of said threshold then decreasing the diversity rate.

120. A gateway comprising

a packet network interface;

an non-packet network interface for real-time media on said non-packet network; and

at least one integrated circuit assembly coupling the non-packet network interface to the packet network interface, said at least one integrated circuit assembly providing media over packet transmission and reception and including a rate-and-diversity control of media packets and diversity packets.

121. A router comprising

a first packet network port;

a second packet network port for real-time media on said second packet network interface; and

at least one integrated circuit assembly coupling the first packet network port to said second packet network port, said at least one integrated circuit assembly providing media over packet transmission and reception and including a rate-and-diversity control of media packets and diversity packets.

122. A private branch exchange comprising

telephone interface circuitry having plural connectors ready for connection to plural telephone units;

a digital network interface ready for connection to PSTN (public switched telephone network); and

at least one integrated circuit assembly coupling the telephone interface circuitry to the digital network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and including a rate-and-diversity control of voice packets.

123. A wireless base station comprising

cellular telephone wireless transmit/receive interface circuitry for communication with any cell telephone handsets in the vicinity of the wireless base station;

a packet network interface; and

at least one integrated circuit assembly coupling the cellular telephone wireless transmit/receive interface circuitry to the packet network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and including a rate-and-diversity control of voice packets.

124. A computer add-in card comprising:

a processor circuit;

a rate-and-diversity control;

a printed wiring board bearing said processor circuit and rate-and-diversity control, said printed wiring board having an output connector for passage of packets and diversity packets therethrough from said processor and said printed wiring board further having an insertion connector, whereby the printed wiring board is insertable via the insertion connector.

125. The computer add-in card of claim 124 further comprising a speech encoder controlled by said rate-and-diversity control.

126. The computer add-in card of claim 124 wherein said speech encoder produces frames of encoded speech and said integrated circuit further comprises a packetizer responsive to the frames to output packets via said output connector.

127. The computer add-in card of claim 124 wherein said processor circuit comprises a digital signal processor multiplier and arithmetic logic unit.

128. The computer add-in card of claim 124 further comprising a non-volatile memory storing instructions establishing said rate-and-diversity control for execution by said processor circuit.

129. The computer add-in card of claim 124 further comprising a non-volatile memory storing instructions establishing both a speech encoder and said rate-and-diversity control for execution by said processor so that said speech encoder is controlled by said rate-and-diversity control.

130. The computer add-in card of claim 124 wherein said rate-and-diversity control comprises instructions for said processor defining sending of packets of real-time information from the add-in card by initially generating at the add-in card the packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

sending the packets via the output connector, thereby resulting in a quality of service QoS;

obtaining at the add-in card a measure of the QoS and comparing the QoS with a threshold of acceptability, and when the QoS is on an unacceptable side of said threshold increasing the diversity rate and sending not only additional ones of the packets of real-time information but also sending diversity packets at the diversity rate as increased.

131. The computer add-in card of claim 124 wherein said rate-and-diversity control comprises instructions defining sending of packets of real-time information from said output connector of the integrated circuit by initially generating packets of real-time information with a source rate and also generating at a diversity rate diversity packets;

sending the packets and diversity packets, thereby resulting in a quality of service QoS;

obtaining at the add-in card a measure of the QoS;

comparing the QoS with a threshold of acceptability; and

when the QoS reaches or exceeds the acceptable side of said threshold then decreasing the diversity rate.

132. A packet network comprising first computer and a second computer both adapted for media over packet, and a network of routers and transmission media coupling said first computer and said second computer, said packet network further comprising plural rate-and-diversity controls.

133. The packet network of claim 132 wherein said network of routers and transmission media includes a computer having router location information accessible by said rate-and-diversity controls.

134. The packet network of claim 132 wherein said network of routers and transmission media includes multicasting routers.

135. A process of sending packets of real-time information comprising the steps of:

initially generating at a sender the packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

sending the packets to a destination;

obtaining plural report data on the sending to said destination;

forming a value of a criterion based on the plural report data, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

136. The process of claim 135 wherein the criterion includes a spike mode determination.

137. The process of claim 135 wherein the criterion includes a occurrence of a spike OR-ed with a packet loss rate exceeding a threshold.

138. The process of claim 135 wherein the criterion includes a delay difference exceeding a function of a delay value and a delay-jitter value.

139. The process of claim 135 wherein the criterion includes an average of delay difference exceeding a function of a delay value and a delay-jitter value.

140. The process of claim 135 wherein the criterion includes an average of delay difference exceeding a delay-jitter value OR-ed with an average of delay difference exceeding a constant.

141. The process of claim 135 wherein the criterion is a comparison of a delay-jitter value with a threshold value.

142. The process of claim 135 wherein the criterion ORs a delay-jitter value exceeding a threshold value, with a packet loss fraction exceeding a threshold.

143. The process of claim 135 wherein the criterion ANDs a delay-jitter value being less than a threshold value, with a packet loss fraction being less than a threshold.

144. The process of claim 135 wherein the criterion includes a trend of increase in a sequence of delay-jitter values.

145. The process of claim 135 wherein the criterion includes a trend of increase in a sequence of delay-jitter values OR-ed with a comparison of a report datum to a threshold.

146. The process of claim 135 wherein the criterion includes a comparison of a ratio of a throughput estimate to current overall transmission rate with a threshold.

147. The process of claim 135 wherein the throughput estimate includes a function of packet size, delay, and average packet loss fraction.

148. The process of claim 135 wherein the criterion tests report data from plural destinations.

149. The process of claim 135 wherein the criterion tests an average of certain report data from plural destinations.

150. The process of claim 135 wherein the criterion tests a median of certain report data from plural destinations.

151. The process of claim 135 wherein the criterion tests a median of certain report data from plural destinations.

152. The process of claim 135 wherein the criterion tests report data from randomly selected ones of plural destinations.

153. The process of claim 135 wherein the criterion tests plural report data from different times from plural destinations.

154. The process of claim 135 wherein the sending operates according to a multiple-description method.

155. The process of claim 135 wherein the diversity packets include media-specific time-diversity packets.

156. The process of claim 135 wherein the diversity packets include Important-Information-based time-diversity packets.

157. The process of claim 135 wherein the diversity packets include forward error correction time-diversity packets.

158. The process of claim 135 wherein the diversity packets include multiple description coding time-diversity packets.

159. The process of claim 135 wherein the diversity packets include multiple description data partitioning time-diversity packets.

160. The process of claim 135 wherein the diversity packets include path-diversity packets.

161. The process of claim 135 wherein the sending step includes sending the diversity packets with combined time-and-path diversity.

162. The process of claim 135 wherein the criterion includes first and second thresholds, and the transitioning step further includes:

when the criterion is on an unacceptable side of the first threshold and the second threshold, transitioning to a lower different source rate than otherwise transitioning to said first-named different source rate when the criterion is on an unacceptable side of said first threshold and but not on an unacceptable side of said second threshold.

163. The process of claim 135 wherein the sending step operates at an old steady state overall transmission rate, and when the criterion is met, selecting a new steady state overall transmission rate from available network resources.

164. The process of claim 135 wherein the criterion includes comparing a ratio of estimated steady state overall transmission rate to current overall transmission rate with a threshold of acceptability;

and when the ratio is on an acceptable side of said threshold then increasing the overall transmission rate.

165. The process of claim 164 wherein when the ratio is not on the acceptable side of said threshold, then increasing the overall transmission rate by an amount less than the overall transmission rate is increased when the ratio is on the acceptable side of said threshold.

166. A process of sending packets of real-time information comprising the steps of:

initially generating at a sender the packets of real-time information with a packets-per-second rate greater than zero packets per second;

sending the packets to a destination;

obtaining a report on the sending to said destination;

forming a value of a criterion based on the report, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

167. The process of claim 166 wherein at least some of the packets include frames whereby a number of frames per packet is established, and the transitioning to the different packets-per-second rate includes transitioning to a different number of frames per packet.

168. The process of claim 166 wherein at least some of the packets include frames whereby a number of frames per packet is established, and wherein the criterion includes first and second thresholds and the transitioning to the different packets-per-second rate includes transitioning to a first different number of frames per packet when the criterion reaches the first threshold, and the process further comprises transitioning to a second different number of frames per packet when the second threshold is reached.

169. The process of claim 166 wherein at least some of the packets include a header including overhead bits whereby an overhead bit rate results from a packets-per-second rate, and the transitioning to the different packets-per-second rate includes transitioning to a different overhead bit rate.

170. The process of claim 169 wherein the different overhead bit rate is accomplished by changing the number of packets-per-second.

171. The process of claim 166 wherein the criterion includes first and second thresholds and the transitioning to the different packets-per-second rate occurs when the criterion reaches the first threshold and the process further comprises transitioning to a different number of packets-per-second when the second threshold is reached.

172. The process of claim 166 wherein the criterion includes first and second thresholds and wherein at least some of the packets include a header including overhead bits whereby an overhead bit rate results from a packets-per-second rate, and the transitioning to the different packets-per-second rate includes transitioning to a first different overhead bit rate when the criterion reaches the first threshold and the process further comprises transitioning to a second different number of packets per second to establish a second different overhead bit rate when the second threshold is reached.

173. The process of claim 166 wherein when the criterion is met, the transitioning to the different packets-per-second rate includes thereupon changing the number of packets-per-second rate during a silence period.

174. The process of claim 166 wherein when the criterion is met, the transitioning to the different packets-per-second rate includes thereupon increasing the number of packets-per-second rate during a silence period only.

175. The process of claim 166 wherein the criterion comprises a first criterion for decrease, and when the first criterion is met, the transitioning to the different packets-per-second rate includes decreasing the packets-per-second rate during either a silence period or during active speech.

176. The process of claim 175 wherein the criterion further comprises a second criterion for increase, and when the second criterion is met, the transitioning to the different packets-per-second rate includes increasing the number of packets-per-second rate during a silence period only.

177. The process of claim 166 further comprising generating second packets of real-time information with a diversity rate.

178. The process of claim 166, further comprising, when the criterion is met, generating diversity packets.

179. The process of claim 178 wherein the diversity packets include time diversity packets.

180. The process of claim 178 wherein the diversity packets include path diversity packets.

181. The process of claim 178 wherein the diversity packets include time diversity packets and path diversity packets.

182. A process of sending packets of real-time information comprising the steps of:

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

183. The process of claim 182 wherein the packets include a primary stage plus one secondary stage, with no diversity offset.

184. The process of claim 182 wherein the packets include G.729 encoded real time information.

185. The process of claim 182 wherein the packets include more than two stages.

186. The process of claim 182 wherein the packets have diversity offsets.

187. The process of claim 182 wherein the Important Information includes at least one LPC (Linear Predictive Coding) parameter.

188. The process of claim 182 wherein the Important Information includes at least one Longterm Prediction lag.

189. The process of claim 182 wherein the Important Information includes a parity check.

190. The process of claim 182 wherein the Important Information includes a fixed codebook gain.

191. The process of claim 182 wherein the Important Information includes an adaptive codebook gain.

192. The process of claim 182 wherein the Important Information includes information according to a sequence

P(n)P(n−

1)′

P(n+1)P(n)′

P(n+2)P(n+1)′

P(n+3)P(n+2).

193. A process of reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the process comprising the steps of:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

194. The process of claim 193 wherein the obtaining and performing steps produce the following reconstructed sequence:

P(n) [P(n+1)′

|−

](excitation) P(n+2) P(n+3).

where “

excitation”

shown above refers to reconstruction of the dashed part of the packet symbol.

195. The process of claim 193 wherein the second stage has included fixed codebook pulses, and the process further comprises obtaining the included fixed codebook pulses from the secondary stage.

196. The process of claim 193 further comprising obtaining fewer than all fixed codebook pulses.

197. The process of claim 196 further comprising setting remaining fixed codebook pulses to zero.

198. A process of reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of two consecutive packet losses, and the process comprising the steps of:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction, to reconstruct a packet (n+2) in a sequence

P(n) [−

] [P(n+2)′

|−

] (excitation) P(n+3).

199. A process of reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of included fixed codebook pulses, LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of two consecutive packet losses, and the process comprising the steps of:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information from the secondary stage the included fixed codebook pulses and one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing a reconstruction, to reconstruct a packet (n+2) in a sequence

P(n) [−

] reconstructed P(n+2) P(n+3).

200. The process of claim 199 further comprising obtaining fewer than all fixed codebook pulses.

201. The process of claim 200 further comprising setting remaining fixed codebook pulses to zero.

202. A process of reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of two consecutive packet losses, and the process comprising the steps of:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing a reconstruction by a frame erasure concealment process utilizing said packet sequence thus received to reconstruct a packet (n+1) in a sequence

P(n) reconstructed packet (n+1) reconstructed packet (n+2) P(n+3).

203. A process of sending packets of real-time information comprising the steps of:

generating code-excited linear prediction (CELP) based information by CELP encoding, the CELP based information including Important Information and fixed excitation information from the CELP encoding;

packetizing the Important Information with a subset of fixed excitation in a first packet; and

packetizing the Important Information with a complementary subset of fixed excitation in a second packet, whereby CELP-based diversity is achieved.

204. The process of claim 203 wherein the packets include two stages, with no diversity offset.

205. The process of claim 203 wherein the packets include G.729 encoded real time information.

206. The process of claim 203 wherein the packets include more than two stages.

207. The process of claim 203 wherein the packets have diversity offsets.

208. The process of claim 203 wherein the Important Information includes at least one LPC (Linear Predictive Coding) parameter.

209. The process of claim 203 wherein the Important Information includes at least one Longterm Prediction lag.

210. The process of claim 203 wherein the Important Information includes a parity check.

211. The process of claim 203 wherein the Important Information includes a fixed codebook gain.

212. The process of claim 203 wherein the Important Information includes an adaptive codebook gain.

213. The process of claim 203 wherein the Important Information includes information according to a sequence

P(n)P(n−

1)′

P(n+1)P(n)′

P(n+2)P(n+1)′

P(n+3)P(n+2)′

.

214. The process of claim 203 wherein the subset of fixed excitation includes every other fixed codebook pulses.

215. A process of reconstruction of a packet stream having CELP based information including Important Information and fixed excitation information from the CELP encoding, wherein the Important Information and a subset of fixed excitation occupy a first packet, and the Important Information and a complementary subset of fixed excitation occupy a second packet, and the process comprising the steps of:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information one or more of said Important Information and subset of fixed excitation and complementary subset of the fixed excitation; and

performing a reconstruction of the Lost Packet utilizing said information thus obtained.

216. The process of claim 215 wherein the performing step produces the following reconstructed sequence:

Reconstructed;

[P(n)|−

](excitation) [P(n+1)′

−

](excitation) P(n+2)+P(n+2)′

P(n+3)+P(n+3)′

, where the plus (+) sign refers to combination of information for reconstruction and where “

excitation”

shown above refers to reconstruction of the dashed part of the packet symbol.

217. The process of claim 215 wherein the subset of fixed excitation includes every other fixed codebook pulses.

218. The process of claim 215 further comprising obtaining fewer than all fixed codebook pulses.

219. The process of claim 216 further comprising setting remaining fixed codebook pulses to zero.

220. The process of claim 215 wherein the first packet includes a first few fixed codebook pulses, and every other fixed codebook pulses from the remaining pulses.

221. The process of claim 220 wherein the second packet includes the same first few fixed codebook pulses and the complementary subset of pulses from the remaining fixed codebook pulses.

222. The process of claim 220 wherein for reconstruction with single packet loss, for packet n and packet (n+1), only one stage is used for reconstruction, and the remaining fixed codebook pulses are set to zero.

223. A process of reconstruction of a packet stream having CELP based information including Important Information and fixed excitation information from the CELP encoding, wherein the Important Information and a subset of fixed excitation occupy a first packet, and the Important Information and a complementary subset of fixed excitation occupy a second packet, the packet stream having an instance of two consecutive packet losses, and the process comprising the steps of:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet][Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information one or more of said Important Information and subset of fixed excitation and complementary subset of the fixed excitation; and

performing a frame erasure concealment process utilizing said information thus obtained to reconstruct a packet (n+1) in a sequence

P(n) reconstructed packet (n+1) reconstructed packet (n+2) P(n+3).

224. A process of sending packets of real-time information comprising the steps of:

generating code-excited linear prediction (CELP) based information by CELP encoding utilizing a fixed codebook search, and minimizing [error(full rate) +w1 error(Description

     1) +w2 error(Description

     2)] , wherein the letters “

w1” and

“

w2”

symbolize weight coefficients, and Description 1 and Description 2 symbolize two descriptions, the CELP based information including Important Information and fixed excitation information from the CELP encoding;

packetizing the Important Information with a subset of fixed excitation in a first packet; and

packetizing the Important Information with a complementary subset of fixed excitation in a second packet, whereby CELP-based diversity is achieved.

225. The process of claim 224 further comprising executing an interpolation filter for shaping/filling of excitation.

226. The process of claim 224 wherein Important Information includes Multiple Description quantizers used for LPC parameters, LTP lags, fixed codebook gain and adaptive codebook gain.

227. The process of claim 224 further comprising applying Forward Error Correction to the Important Information.

228. The process of claim 224 further comprising interleaving combined with the diversity.

229. The process of claim 224 further comprising interpolation of parameters in addition to fixed excitation repeating, from available (past/future) frames.

230. A single-chip integrated circuit comprising:

a processor circuit; and

a memory on said single-chip integrated circuit holding bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

231. A single-chip integrated circuit comprising:

a processor circuit; and

a memory on said single-chip integrated circuit holding bits defining a process of;

initially generating packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

232. A single-chip integrated circuit comprising:

a processor circuit; and

a memory on said single-chip integrated circuit holding bits defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

233. A single-chip integrated circuit comprising:

a processor circuit; and

a memory on said single-chip integrated circuit holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

234. A wireless telephone comprising an antenna, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the antenna, said at least one integrated circuit assembly providing voice over packet transmissions and including bits defining:

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

235. A wireless telephone comprising an antenna, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the antenna, said at least one integrated circuit assembly providing voice over packet transmissions and including bits defining:

initially generating packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

236. A wireless telephone comprising an antenna, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the antenna, said at least one integrated circuit assembly providing voice over packet transmissions and including bits defining:

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

237. A wireless telephone comprising an antenna, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the antenna, said at least one integrated circuit assembly providing voice over packet transmissions and including bits defining:

reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

238. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

239. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining a process of;

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

240. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

241. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

242. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of two consecutive packet losses, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction to reconstruct a packet (n+2) in a sequence

P(n) [−

][P(n+2)′

|−

](excitation) P(n+3).

243. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of included fixed codebook pulses, LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of two consecutive packet losses, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information from the secondary stage the included fixed codebook pulses and one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing a reconstruction to reconstruct a packet (n+2) in a sequence

P(n) [−

] reconstructed P(n+2) P(n+3).

244. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of two consecutive packet losses, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of said LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing a frame erasure concealment process utilizing said information thus obtained to reconstruct a packet (n+1) in a sequence

P(n) reconstructed packet (n+1) reconstructed packet (n+2) P(n+3).

245. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining

generating code-excited linear prediction (CELP) based information by CELP encoding, the CELP based information including Important Information and fixed excitation information from the CELP encoding;

packetizing the Important Information with a subset of fixed excitation in a first packet; and

packetizing the Important Information with a complementary subset of fixed excitation in a second packet, whereby CELP-based diversity is achieved.

246. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining reconstruction of a packet stream having CELP based information including Important Information and fixed excitation information from the CELP encoding, wherein the Important Information and a subset of fixed excitation occupy a first packet, and the Important Information and a complementary subset of fixed excitation occupy a second packet, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information one or more of said Important Information and subset of fixed excitation and complementary subset of the fixed excitation; and

performing a reconstruction of the Lost Packet utilizing said information thus obtained.

247. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining reconstruction of a packet stream having CELP based information including Important Information and fixed excitation information from the CELP encoding, wherein the Important Information and a subset of fixed excitation occupy a first packet, and the Important Information and a complementary subset of fixed excitation occupy a second packet, the packet stream having an instance of two consecutive packet losses, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] [Second Lost Packet] P(n+3)P(n+2)′

;

obtaining as information one or more of said Important Information and subset of fixed excitation and complementary subset of the fixed excitation; and

performing a frame erasure concealment process utilizing said information thus obtained to reconstruct a packet (n+1) in a sequence

ti P(n) reconstructed packet (n+1) reconstructed packet (n+2) P(n+3).

248. An information storage article of manufacture comprising:

a storage medium holding physical variations representing bits of information; and

said bits of information defining;

generating code-excited linear prediction (CELP) based information by CELP encoding utilizing a fixed codebook search, and minimizing [error(full rate)+w1 error(Description

     1)+w2 error(Description

     2)] , wherein the letters “

w1” and

“

w2”

symbolize weight coefficients, and Description 1 and Description 2 symbolize two descriptions, the CELP based information including Important Information and fixed excitation information from the CELP encoding;

packetizing the Important Information with a subset of fixed excitation in a first packet; and

packetizing the Important Information with a complementary subset of fixed excitation in a second packet, whereby CELP-based diversity is achieved.

249. A media over packet networking appliance comprising:

a network interface;

a voice transducer; and

at least one integrated circuit assembly coupling the voice transducer to the network interface, said at least one integrated circuit assembly providing media over packet transmissions and holding bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

250. A media over packet networking appliance comprising:

a network interface;

a voice transducer; and

at least one integrated circuit assembly coupling the voice transducer to the network interface, said at least one integrated circuit assembly providing media over packet transmissions and holding bits defining a process of;

initially generating packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

251. A media over packet networking appliance comprising:

a network interface;

a voice transducer; and

at least one integrated circuit assembly coupling the voice transducer to the network interface, said at least one integrated circuit assembly providing media over packet transmissions and holding bits defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

252. A media over packet networking appliance comprising:

a network interface;

a voice transducer; and

at least one integrated circuit assembly coupling the voice transducer to the network interface, said at least one integrated circuit assembly providing media over packet transmissions and holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

253. A computer comprising

a network interface;

an audio reception transducer;

an audio emission transducer; and

at least one integrated circuit assembly coupling the audio reception transducer and audio emission transducer to the network interface, said at least one integrated circuit assembly providing audio over packet transmission and reception and including bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

254. A computer comprising

A network interface;

an audio reception transducer;

an audio emission transducer; and

at least one integrated circuit assembly coupling the audio reception transducer and audio emission transducer to the network interface, said at least one integrated circuit assembly providing audio over packet transmission and reception and holding bits defining a process of;

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

255. A computer comprising

A network interface;

an audio reception transducer;

an audio emission transducer; and

at least one integrated circuit assembly coupling the audio reception transducer and audio emission transducer to the network interface, said at least one integrated circuit assembly providing audio over packet transmission and reception and holding bits defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

256. A computer comprising

A network interface;

an audio reception transducer;

an audio emission transducer; and

at least one integrated circuit assembly coupling the audio reception transducer and audio emission transducer to the network interface, said at least one integrated circuit assembly providing audio over packet transmission and reception and holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

257. A gateway comprising

a packet network interface;

an non-packet network interface for real-time media on said non-packet network; and

at least one integrated circuit assembly coupling the non-packet network interface to the packet network interface, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

258. A gateway comprising

a packet network interface;

an non-packet network interface for real-time media on said non-packet network; and

at least one integrated circuit assembly coupling the non-packet network interface to the packet network interface, said at least one integrated circuit assembly providing media over packet transmission and holding bits defining a process of;

initially generating packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

259. A gateway comprising

a packet network interface;

an non-packet network interface for real-time media on said non-packet network; and

at least one integrated circuit assembly coupling the non-packet network interface to the packet network interface, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

260. A gateway comprising

a packet network interface;

an non-packet network interface for real-time media on said non-packet network; and

at least one integrated circuit assembly coupling the non-packet network interface to the packet network interface, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

261. A router comprising

a first packet network port;

a second packet network port for real-time media on said second packet network interface; and

at least one integrated circuit assembly coupling the first packet network port to said second packet network port, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

262. A router comprising

a first packet network port;

a second packet network port for real-time media on said second packet network interface; and

at least one integrated circuit assembly coupling the first packet network port to said second packet network port, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining a process of;

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

263. A router comprising

a first packet network port;

a second packet network port for real-time media on said second packet network interface; and

at least one integrated circuit assembly coupling the first packet network port to said second packet network port, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

264. A router comprising

a first packet network port;

a second packet network port for real-time media on said second packet network interface; and

at least one integrated circuit assembly coupling the first packet network port to said second packet network port, said at least one integrated circuit assembly providing media over packet transmission and reception and holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

265. A private branch exchange comprising

telephone interface circuitry having plural connectors ready for connection to plural telephone units;

a digital network interface ready for connection to PSTN (public switched telephone network); and

at least one integrated circuit assembly coupling the telephone interface circuitry to the digital network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

266. A private branch exchange comprising

telephone interface circuitry having plural connectors ready for connection to plural telephone units;

a digital network interface ready for connection to PSTN (public switched telephone network); and

at least one integrated circuit assembly coupling the telephone interface circuitry to the digital network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining a process of;

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

267. A private branch exchange comprising

telephone interface circuitry having plural connectors ready for connection to plural telephone units;

a digital network interface ready for connection to PSTN (public switched telephone network); and

at least one integrated circuit assembly coupling the telephone interface circuitry to the digital network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining a process of;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

268. A private branch exchange comprising

telephone interface circuitry having plural connectors ready for connection to plural telephone units;

a digital network interface ready for connection to PSTN (public switched telephone network); and

at least one integrated circuit assembly coupling the telephone interface circuitry to the digital network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

269. A wireless base station comprising

cellular telephone wireless transmit/receive interface circuitry for communication with any cell telephone handsets in the vicinity of the wireless base station;

a packet network interface; and

at least one integrated circuit assembly coupling the cellular telephone wireless transmit/receive interface circuitry to the packet network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining a process of;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

270. A wireless base station comprising

cellular telephone wireless transmit/receive interface circuitry for communication with any cell telephone handsets in the vicinity of the wireless base station;

a packet network interface; and

at least one integrated circuit assembly coupling the cellular telephone wireless transmit/receive interface circuitry to the packet network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining a process of;

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

271. A wireless base station comprising

cellular telephone wireless transmit/receive interface circuitry for communication with any cell telephone handsets in the vicinity of the wireless base station;

a packet network interface; and

at least one integrated circuit assembly coupling the cellular telephone wireless transmit/receive interface circuitry to the packet network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining a process of

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

272. A wireless base station comprising

cellular telephone wireless transmit/receive interface circuitry for communication with any cell telephone handsets in the vicinity of the wireless base station;

a packet network interface; and

at least one integrated circuit assembly coupling the cellular telephone wireless transmit/receive interface circuitry to the packet network interface, said at least one integrated circuit assembly providing voice over packet transmission and reception and holding bits defining reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.

273. A computer add-in card comprising:

a processor circuit and a memory;

a printed wiring board bearing said processor circuit and the memory, the memory holding bits defining;

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate;

said printed wiring board having an output connector for passage of packets and diversity packets therethrough from said processor, and said printed wiring board further having an insertion connector, whereby the printed wiring board is insertable via the insertion connector.

274. A computer add-in card comprising:

a processor circuit and a memory;

a printed wiring board bearing said processor circuit and the memory, the memory holding bits defining;

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate;

said printed wiring board having an output connector for passage of packets and diversity packets therethrough from said processor, and said printed wiring board further having an insertion connector, whereby the printed wiring board is insertable via the insertion connector.

275. A computer add-in card comprising:

a processor circuit and a memory;

a printed wiring board bearing said processor circuit and the memory, the memory holding bits defining;

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity; and

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets;

said printed wiring board having an output connector for passage of packets and diversity packets therethrough from said processor, and said printed wiring board further having an insertion connector, whereby the printed wiring board is insertable via the insertion connector.

276. A computer add-in card comprising:

a processor circuit and a memory;

a printed wiring board bearing said processor circuit and the memory, the memory holding bits defining;

reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising;

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received;

said printed wiring board having an output connector for passage of packets and diversity packets therethrough from said processor, and said printed wiring board further having an insertion connector, whereby the printed wiring board is insertable via the insertion connector.

277. A packet network comprising first computer and a second computer both adapted for media over packet, and a network of routers and transmission media coupling said first computer and said second computer, said packet network supporting operations therein of:

initially generating packets of real-time information with a source rate greater than zero kilobits per second, and a diversity rate, the diversity rate initially being at least zero kilobits per second;

forming a value of a criterion based on plural report data representative of quality of transmission to a destination, for transition to a different source rate; and

when the criterion is met, transitioning to the different source rate.

278. A packet network comprising first computer and a second computer both adapted for media over packet, and a network of routers and transmission media coupling said first computer and said second computer, said packet network supporting operations therein of:

initially generating at a sender packets of real-time information with a packets-per-second rate greater than zero packets per second;

forming a value of a criterion based on report data representative of sending the packets to a destination, for transition to a different packets-per-second rate; and

when the criterion is met, transitioning to the different packets-per-second rate.

279. A packet network comprising first computer and a second computer both adapted for media over packet, and a network of routers and transmission media coupling said first computer and said second computer, said packet network supporting operations therein of:

generating code-excited linear prediction (CELP) based real-time information by CELP encoding;

concurrently producing Important Information from the CELP encoding, thereby achieving diversity;

packetizing the CELP-based real-time information and the Important Information from the CELP encoding, thereby generating packets and diversity packets.

280. A packet network comprising first computer and a second computer both adapted for media over packet, and a network of routers and transmission media coupling said first computer and said second computer, said packet network supporting operations therein of reconstruction of a packet stream having a primary stage and a secondary stage, the secondary stage having one or more of LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains, the packet stream having an instance of single packet loss, and the reconstruction comprising:

receiving a packet sequence represented by

P(n)P(n−

1)′

[Lost Packet] P(n+2)P(n+1)′

P(n+3)P(n+2)′

;

obtaining as information from the secondary stage one or more of the LPC parameters, LTP lags, parity check, and adaptive and fixed codebook gains; and

performing an excitation reconstruction utilizing said packet sequence thus received.