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Clock and data recovery circuit

  • US 20040252804A1
  • Filed: 06/07/2004
  • Published: 12/16/2004
  • Est. Priority Date: 06/11/2003
  • Status: Active Grant
First Claim
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1. A clock and data recovery circuit having a frequency tracking loop and a phase tracking loop, said clock and data recovery circuit comprising:

  • a phase detector comparing a phase of an input data signal with a phase of a synchronous clock signal;

    a phase interpolator receiving an input clock signal and a control signal, adjusting a phase of an output clock signal based on the control signal, and supplying the output clock signal to said phase detector as the synchronous clock signal;

    said phase detector and said phase interpolator owned in common by said frequency tracking loop and said phase tracking loop;

    a pattern generator generating a signal for variably setting the phase of the output clock signal from said phase interpolator based on a result of phase comparison by said phase detector and outputting the so generated signal;

    said pattern generator provided in said frequency tracking loop; and

    a circuit generating the control signal to said phase interpolator based on a result of phase detection by said phase tracking loop and an output signal of said pattern generator in said frequency tracking loop.

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