Integrated multimedia system

• US 20040255058A1
• Filed: 06/15/2004
• Published: 12/16/2004
• Est. Priority Date: 10/14/1998
• Status: Abandoned Application

• Current Assignee: Hitachi, Ltd., Equator Technologies, Inc. (Pixelworks Incorporated)
• Original Assignee: Hitachi, Ltd., Equator Technologies, Inc. (Pixelworks Incorporated)
• Inventors: Naik, Vinay, Miyazaki, Takeshi, Baker, David, Kojima, Keiji, Kawaguchi, Atsuo, Basoglu, Christopher, Nojiri, Toru, Mundkur, Yatin, Nishioka, Kiyokazu, Padalkar, Sarang, Lee, Woobin, Deeley, Richard, Gervasio, Gregorio, Cutler, Benjamin, OʼDonnell, John
• Application Number:
  US10/867,868
• Publication Number:
  US 20040255058A1
• Time in Patent Office: Days
• US Class Current: 710/20
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/124 where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
• CPC Class Codes: G06T 15/005 General purpose rendering architectures

Abstract

An integrated multimedia system has a multimedia processor disposed in an integrated circuit. The system comprises a first host processor system which is coupled to the multimedia processor. A second local processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the second processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the second processor and the data transfer switch and configured to perform three dimensional graphic operations.

A data streamer is coupled to the data transfer switch, and configured to schedule simultaneous data transfers among a plurality of modules disposed within the multimedia processor in accordance with the corresponding channel allocations. An interface unit is coupled to the data streamer and has a plurality of input/output (I/O) device driver units. A multiplexer is coupled to the interface unit and provides access between a selected number of I/O device driver units and external I/O devices via output pins. A plurality of external I/O devices are coupled to the multimedia processor.

Claims

1. An integrated multimedia system having a multimedia processor disposed in an integrated circuit, said system comprising:

a processor disposed within said multimedia processor for controlling the operation of said multimedia processor;

a data transfer switch disposed within said multimedia processor and coupled to said processor for transferring data to various modules of the multimedia processor;

a data streamer disposed within said multimedia processor and coupled to said data transfer switch, said data streamer having a scheduling logic that is configured to schedule data transfers among a plurality of modules in accordance with the corresponding channel allocations;

an interface unit coupled to said data streamer having a plurality of I/O device driver units including a serial interface unit;

a fixed function unit disposed within said multimedia processor and coupled to said data transfer switch;

a multiplexer disposed within said multimedia processor and coupled to said interface unit providing access between a selected number of said I/O device driver units and a plurality of external I/O devices coupled to said multimedia processor via output pins; and

,

a memory for storing data;

wherein said data streamer transfers said data from said memory to said fixed function unit.

2. The system in accordance with claim 1, said serial interface unit is a universal serial bus interface unit.

3. The system in accordance with claim 1, one of said external I/O devices is a display device, wherein said fixed function unit includes a video scaler unit that is configured to provide up or down scaling of said data, and output processed data to a display device via said data transfer switch.

4. The system in accordance with claim 1, one of said external I/O devices is a display device, wherein said fixed function unit includes a video scaler unit that is configured to provide up or down scaling of said data, and output processed data to said display device.

5. The system in accordance with claim 1, one of said external I/O devices is a NTSC encoder, wherein said fixed function unit includes a video scaler unit that is configured to provide up or down scaling of said data, and output processed data to said NTSC encoder via said data transfer switch.

6. The system in accordance with claim 1, one of said external I/O devices is a NTSC decoder, wherein said fixed function unit includes a video scaler unit that is configured to provide up or down scaling of data input from NTSC decoder via said data transfer switch.

7. The system in accordance with claim 1, said multimedia processor is coupled to a host comuuter system.

8. The system in accordance with claim 1, said external I/O devices are controlled by a corresponding one of said I/O device driver units.

9. The system in accordance with claim 1, said plurality of modules includes at least one cache memory.

10. The system in accordance with claim 1, said memory is coupled to said multimedia processor via a memory controller.