Microcomputer

• US 20040255207A1
• Filed: 04/30/2004
• Published: 12/16/2004
• Est. Priority Date: 04/30/2003
• Status: Abandoned Application

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Ika, Kazuhiro, Iwasaki, Tamaki
• Application Number:
  US10/835,070
• Publication Number:
  US 20040255207A1
• Time in Patent Office: Days
• US Class Current: 714/55
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

A microcomputer including a runaway detection control unit for monitoring a communication between external processing units that are provided outside the microcomputer, and a memory access control unit. When detecting that the communication between an external processing unit and the CPU gets into a runaway state while the CPU is performing a memory access to the external processing unit in a handshaking method, the runaway detection control unit outputs a pseudo acknowledge signal to the memory access control unit, in place of the normal acknowledge signal. When receiving the pseudo acknowledge signal via the memory access control unit, the CPU switches the memory access method for the external processing unit to the fixed waiting mode.

Claims

1. A microcomputer comprising a central processing unit and a memory access control unit that performs a control when the central processing unit makes a memory access to an external processing unit having a memory function, including

a runaway detection control unit comprising:

a watching dog timer including a counter, for counting a time using the counter and generating a pulse signal when a predetermined time is counted;

a runaway detection circuit for detecting that a memory access from the central processing unit to the external processing unit has not been normally finished and outputting a runaway detection signal;

a signal generation unit for generating a pseudo acknowledge signal indicating that the memory access from the central processing unit to the external processing unit has been finished, on the basis of the runaway detection signal, and outputting the generated acknowledge signal to the central processing unit; and

said runaway detection circuit outputting the runaway detection signal when the watching dog timer generates the pulse signal during a period from which a memory access from the central processing unit to the external processing unit is started to when the memory access is finished.

2. The microcomputer of claim 1 wherein

said central processing unit exclusively performs a memory access to a plurality of the external processing units, and

said runaway detection control unit detects an external processing unit, the memory access to which from the central processing unit has not been normally finished.

3. The microcomputer of claim 1 wherein

when the runaway detection control unit detects that the memory access from the central processing unit to the external processing unit has not been normally finished, the central processing unit switches a memory access method for the external processing unit from a handshaking mode to a fixed waiting mode.

4. The microcomputer of claim 2 wherein

said runaway detection control unit includes a reset circuit for initializing the runaway detection circuit which has detected that the memory access from the central processing unit to the external processing unit has not been normally finished, and freeing a memory space of the external processing unit, the memory access to which from the central processing unit has not been normally finished.

5. A microcomputer comprising a central processing unit and a memory access control unit that performs a control when the central processing unit makes a memory access to an external processing unit having a memory function, including

a runaway detection control unit comprising:

a watching dog timer including a counter, for counting a time using the counter and generating a pulse signal when a predetermined time is counted;

a runaway detection circuit for detecting that a memory access from the central processing unit to the external processing unit has not been normally finished and outputting a runaway detection signal; and

said runaway detection circuit outputting the runaway detection signal to an interrupt processing unit of the central processing unit when the watching dog timer generates the pulse signal during a period from when the memory access from the central processing unit to the external processing unit is started to which the memory access is finished, and

said interrupt processing unit limiting the memory access to the external processing unit when receiving the runaway detection signal.

6. A microcomputer comprising a central processing unit and a memory access control unit that performs a control when the central processing unit exclusively makes a memory access to a plurality of external processing units each having a memory function, including:

a runaway informing unit for receiving a runaway notification from an external processing unit, the memory access to which from the central processing unit has not been normally finish and has gotten into a runaway state, and providing the central processing unit with information of the external processing unit that has gotten into the runaway state via an external processing unit that is different from the external processing unit that has gotten into the runaway state and the memory access control unit.

7. A microcomputer comprising a central processing unit and a memory access control unit that performs a control when the central processing unit makes a memory access to an external processing unit having a memory function, including

a runaway avoidance control unit comprising:

a watching dog timer including a counter, for counting a time using the counter and generating a pulse signal when a predetermined time is counted;

a signal generation unit for generating a pseudo acknowledge signal indicating that a memory access from the central processing unit to the external processing unit has been finished, on the basis of the pulse signal; and

said signal generation unit outputting the pseudo acknowledge signal to the central processing unit when the watching dog timer has counted the predetermined time after the memory access was started.