Schottky diode using charge balance structure

• US 20040256690A1
• Filed: 04/09/2004
• Published: 12/23/2004
• Est. Priority Date: 10/17/2001
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Kocon, Christopher Boguslaw
• Granted Patent: US 7,061,066 B2
• Time in Patent Office: Days
• US Class Current: 257/471
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

In accordance with an embodiment of the invention, a Schottky diode includes a metal layer in contact with a semiconductor region to form a Schottky barrier therebetween. A first trench extends in the semiconductor region. The first trench includes at least one electrode or diode therein.

Claims

1. A Schottky diode comprising:

a metal layer and a semiconductor region forming a Schottky barrier therebetween;

a plurality of charge control electrodes formed in the semiconductor region so as to influence an electric field in the semiconductor region, wherein at least two of the plurality of charge control electrodes are electrically decoupled from one another so as to be biased differently from one another; and

a dielectric material insulating each of the plurality of charge control electrodes from one another and from the semiconductor region.

2. The Schottky diode of claim 1 further comprising an anode electrode coupled to the metal layer and a cathode electrode coupled to the semiconductor region, the plurality of charge control electrodes being located between the anode and cathode electrodes.

3. The Schottky diode of claim 1 wherein the semiconductor region comprises a substrate and an epitaxial layer extending over the substrate, the plurality of charge control electrodes being formed in the epitaxial layer.

4. The Schottky diode of claim 1 wherein the plurality of charge control electrodes is in a plurality of trenches formed in the semiconductor region.

5. The Schottky diode of claim 4 wherein the plurality of charge control electrodes in the plurality of trenches are insulated from one another and from the semiconductor region.

6. The Schottky diode of claim 4 further comprising a plurality of shallow regions each formed in a top surface region of the semiconductor region between adjacent pairs of the plurality of trenches such that the metal layer is in direct contact with the shallow region, the shallow region having the same conductivity type as but a lower doping concentration than the semiconductor region.

7. The Schottky diode of claim 6 wherein the semiconductor region and the shallow region are n-type.

8. The Schottky diode of claim 1 further comprising a biasing element coupled to bias the at least two of the plurality of charge control electrodes differently from one another.

9. The Schottky diode of claim 1 wherein each of the plurality of charge control electrodes comprises polysilicon.

10. The Schottky diode of claim 1 wherein the plurality of charge control electrodes is biased to produce a substantially uniform electric field in the semiconductor region.

11. A method for forming a Schottky diode having a semiconductor region, the method comprising:

forming a plurality of charge control electrodes in the semiconductor region so as to influence an electric field in the semiconductor region, wherein at least two of the charge control electrodes are adapted to be biased differently from one another; and

overlaying the semiconductor region with a metal layer to thereby form a Schottky barrier therebetween.

12. The method of claim 11 further comprising forming a plurality of trenches in the semiconductor region, and wherein the step of forming a plurality of charge control electrodes comprises:

lining each of the plurality of trenches with an insulating layer;

depositing a first conductive material in each trench and then etching the first deposited conductive material to form a first charge control electrodes in each trench;

forming a first insulating layer over each of the first charge control electrodes;

depositing a second conductive material in each trench and then etching the second deposited conductive material to form a second charge control electrode in each trench over the first insulating layer.

13. The method of claim 11 further comprising:

forming a plurality of trenches extending into the semiconductor region, the plurality of charge control electrodes being formed in the plurality of trenches; and

forming a plurality of shallow regions in a top surface region of the semiconductor region between adjacent pairs of the plurality of trenches such that the metal layer is in direct contact with the shallow regions, the shallow layer having the same conductivity type as but a lower doping concentration than that of the semiconductor region.

14. The method of claim 13 further comprising forming the plurality of charge control electrodes in the plurality of trenches such that the plurality of charge control electrodes are insulated from one another and from the semiconductor region.

15. The method of claim 13 wherein the semiconductor region and the shallow layer are n-type.

16. The method of claim 11 wherein the method further comprises forming a plurality of biasing elements on or in the semiconductor region, wherein the biasing elements are adapted to bias the at least two charge control electrodes at different voltages.

17. The method of claim 11 wherein the first and second charge control electrodes comprise polysilicon.

18. A Schottky diode comprising:

a metal layer and a semiconductor region forming a Schottky barrier therebetween; and

a first trench extending in the semiconductor region, the first trench having at least one diode therein.

19. The Schottky diode of claim 18 wherein the at least one diode is reverse biased during Schottky diode operation.

20. The Schottky diode of claim 18 further comprising an insulating layer which lines the sidewalls of the first trench but is discontinuous along the bottom of the first trench.

21. The Schottky diode of claim 18 wherein the first trench further includes an insulating layer configured to insulate the at least one diode from the semiconductor region along the sidewalls of the first trench.

22. The Schottky diode of claim 18 wherein the semiconductor region is an epitaxial layer formed over and in contact with a substrate.

23. The Schottky diode of claim 22 wherein the first trench extends into the epitaxial layer and terminates at an interface between the semiconductor region and the epitaxial layer.

24. The Schottky diode of claim 22 wherein the first trench extends into and terminates within the epitaxial layer.

25. The Schottky diode of claim 18 wherein the at least one diode is arranged in the first trench so that when the Schottky diode is biased in a blocking state an electric field induced in the at least one diode influences an electric field in the semiconductor region to thereby increase the blocking voltage of the Schottky diode.

26. The Schottky diode of claim 18 wherein the at least one diode is arranged in the first trench so that when the Schottky diode is biased in a blocking state an electric field induced in the at least one diode results in a substantially uniform charge distribution in the semiconductor region.

27. The Schottky diode of claim 18 wherein the at least one diode includes n-type and p-type regions alternately stacked on top of one another in the trench.

28. The Schottky diode of claim 18 wherein the at least one diode comprises a p-type silicon region in contact with an n-type silicon region.

29. The Schottky diode of claim 18 wherein the at least one diode comprises a p-doped polycrystalline silicon material in contact with an n-doped polycrystalline silicon material.

30. The Schottky diode of claim 18 further comprising a shallow region on each side of the first trench in a top surface region of the semiconductor region such that the metal layer is in direct contact with the shallow region to form a Schottky barrier therebetween, the shallow region having the same conductivity type as but a lower doping concentration than the semiconductor region.

31. The Schottky diode of claim 30 wherein the semiconductor region and the shallow region are n-type.

32. The Schottky diode of claim 18 further comprising an anode electrode coupled to the metal layer and a cathode electrode coupled to the semiconductor region, the first trench extending between the anode and cathode electrodes.

33. A Schottky diode comprising:

a metal layer;

a semiconductor region in contact with the metal layer to form a Schottky barrier junction therebetween;

a plurality of laterally spaced trenches each extending through at least a portion of the semiconductor region; and

a plurality of diodes in each of the plurality of trenches, the plurality of diodes in each trench being insulated from the semiconductor region along the trench sidewalls,

wherein the plurality of diodes in each trench are reverse-biased during operation.

34. The Schottky diode of claim 33 wherein the plurality of diodes are positioned in each of the plurality of trenches such that an electric field induced in one or more of the plurality of diodes influences an electric field in the semiconductor region such that a blocking voltage of the Schottky diode is increased.

35. The Schottky diode of claim 33 wherein each of the plurality of trenches further includes an insulating layer which lines the trench sidewalls but is discontinuous along the bottom of the trench.

36. The Schottky diode of claim 33 further comprising at least two terminals located along opposite surfaces of the Schottky diode, the at least two terminals being configured to bias the Schottky diode during operation,

wherein the plurality of trenches extends vertically between the two terminals, and the plurality of diodes in each trench includes p-type and n-type regions alternately stacked on top of each other in each trench.

37. The Schottky diode of claim 33 further comprising a plurality of shallow regions each formed in a top surface region of the semiconductor region between adjacent pairs of the plurality of trenches such that the metal layer is in direct contact with the shallow region, the shallow region having the same conductivity type as but a lower doping concentration than the semiconductor region.

38. A method of forming a Schottky diode, comprising:

forming a first trench extending in a semiconductor region; and

forming at least one diode in the first trench; and

overlaying the semiconductor region with a metal layer to thereby form a Schottky barrier therebetween.

39. The method of claim 38 further comprising:

forming an insulating layer which extends along sidewalls of the first trench but is discontinuous along the bottom of the first trench.

40. The method of claim 38 further comprising:

forming an insulating layer configured to insulate the at least one diode from the semiconductor region along the sidewalls of the first trench.

41. The method of claim 38 wherein the semiconductor region is an epitaxial layer, the method further comprising:

forming the epitaxial layer over and in contact with a substrate, the epitaxial layer being of the same conductivity type as the substrate.

42. The method of claim 38 wherein the at least one diode is arranged in the first trench so that when the Schottky diode is biased in a blocking state an electric field induced in the at least one diode influences an electric field in the semiconductor region to thereby increase the blocking voltage of the Schottky diode.

43. The Schottky diode of claim 38 wherein the at least one diode is arranged in the first trench so that when the Schottky diode is biased in a blocking state an electric field induced in the at least one diode results in a uniform charge distribution in the semiconductor region.

44. The method of claim 38 wherein the step of forming at least one diode comprises forming n-type and p-type regions alternately stacked on top of one another in the first trench.

45. The method of claim 38 further comprising:

forming a plurality of shallow regions in a top surface region of the semiconductor region between adjacent pairs of the plurality of trenches such that the metal layer is in direct contact with the shallow regions to form a Schottky barrier therebetween, the shallow layer having the same conductivity type as but a lower doping concentration than that of the semiconductor region.

46. The method of claim 45 wherein the semiconductor region and the shallow layer are n-type.

47. The method of claim 38 wherein the at least one diode is from one of doped silicon material and doped polysilicon material.

48. A method of forming a Schottky diode, comprising:

forming a plurality of laterally spaced trenches in a semiconductor region, each trench extending through at least a portion of the semiconductor region;

forming a plurality of diodes in each of the plurality of trenches; and

overlaying the semiconductor region with a metal layer so as to form a Schottky barrier therebetween.

49. The method of claim 48 wherein the plurality of diodes are formed in each of the plurality of trenches such that an electric field induced in one or more of the plurality of diodes influences an electric field in the semiconductor region such that a blocking voltage of the Schottky diode is increased.

50. The method of claim 48 further comprising:

forming an insulating layer in each of the plurality of trenches, the insulating layer extending along the trench sidewalls but being discontinuous along the bottom of the trench.

51. The method of claim 48 further comprising:

forming at least two terminals located along opposite surfaces of the Schottky diode, the plurality of trenches extending vertically between the two terminals,

wherein the step of forming a plurality of diodes comprises forming p-type and n-type regions alternately stacked on top of each other in each trench.

52. The method of claim 48 further comprising:

before forming the plurality of trenches, forming a shallow layer along an upper surface of the semiconductor region, the shallow layer having the same conductivity type as but a lower doping concentration than that of the semiconductor region, the plurality of trenches extending through the shallow layer and into the semiconductor region such that the shallow layer is broken up into a plurality of shallow regions between adjacent trenches, wherein the metal layer is in direct contact with the plurality of shallow regions to form a Schottky barrier therebetween.