High voltage switch circuitry

• US 20040257859A1
• Filed: 05/28/2004
• Published: 12/23/2004
• Est. Priority Date: 01/08/2002
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Bassem Radieddine, Douglas D. Smith, Myron Buer
• Inventors: Smith, Douglas D., Buer, Myron, Radieddine, Bassem
• Granted Patent: US 6,901,004 B2
• Time in Patent Office: Days
• US Class Current: 365/154
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable memory device using such a high voltage switch. The memory device includes a plurality of one time programmable memory cells arranged in an array and adapted to be programmed using a high voltage, wherein each of the memory cells includes at least one storage element and two gated fuses connected to the storage element. A high voltage switch is connected to at least one of the memory cells and is adapted to switch in a high voltage.

Claims

1. A memory device comprising:

a memory cell adapted to store data; and

a voltage switch device coupled to said memory cell and adapted to set a state of said memory cell.

2. The memory device of claim 1, wherein said memory cell includes at least one gated device.

3. The memory device of claim 2, wherein said gated device comprises at least one gate-ox fuse element.

4. The memory device of claim 2, wherein said gated device comprises two thin gate-ox fuse elements.

5. The memory device of claim 4, wherein an oxide of said thin gate-ox fuse element is about 2.5 nm thick or less.

6. The memory device of claim 1, wherein said memory cell includes a 6T storage element.

7. The memory device of claim 1, wherein said voltage switch device switches in a voltage ranging between about 0 volts and about 5 volts.

8. The memory device of claim 1, wherein said voltage switch device includes at least one level shifter adapted to shift incoming data to a higher voltage.

9. The memory device of claim 1, wherein said voltage switch device includes at least one selecting device adapted to select at least one column in an array.

10. The memory device of claim 1, wherein said voltage switch device includes at least one PFet transistor adapted to switch a high voltage.

11. A one-time programmable memory device comprising:

at least two memory cells in an array adapted to be programmed using a high voltage; and

at least one high voltage switch connected to at least one of said memory cells and adapted to switch in a high voltage.

12. The memory device of claim 11, wherein each of said memory cells includes at least one storage element adapted to store data and at least one gated fuse connected to said storage element.

13. The memory device of claim 11, wherein said voltage switch device includes at least one selecting device adapted to select at least one column in said array.

14. The memory device of claim 11, wherein said high voltage switch includes at least one level shifter adapted to shift incoming data to a higher voltage.

15. A one time programmable memory device comprising:

a plurality of memory cells adapted to be programmed using a high voltage, wherein each of said memory cells includes at least one storage element and two gated fuses connected to said storage element; and

at least one high voltage switch connected to at least one of said memory cells and adapted to switch in said high voltage.

16. The memory device of claim 15, wherein said memory cells are arranged in a plurality of rows and columns.

17. The memory cell of claim 16, wherein one high voltage switch is attached to a plurality of said memory cells in each column.

18. A method of setting a state of a memory cell having at least one gated fuse using a high voltage switch.

19. The method of claim 18, wherein said high voltage switch switches in a voltage ranging between about 0 volts and about 5 volts.

20. The method of claim 18, wherein said gated fuse is a thin oxide gated fuse.