Test structure for detecting defect size in a semiconductor device and test method using same
First Claim
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1. A test structure for a semiconductor device, the test structure comprising:
- a first test pattern including a plurality of electrically separated metal patterns;
a plurality of metal vias formed proximate first and second end portions of each one of the plurality of metal patterns forming the first test pattern; and
a second test pattern electrically connected to the first test pattern by the plurality of metal vias, such that a test voltage applied to the first test pattern indicates a resistance that varies in accordance with the presence and nature of a metal failure.
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Abstract
A test structure and method for testing a semiconductor device are provided. The test structure including a first test pattern having a plurality of electrically separated metal patterns, a plurality of metal vias formed in opposite end portions of the respective metal patterns, and a second test pattern connected to the first test pattern through the metal vias. By using this structure, the presence, nature, and size of a metal failure can be detected by analyzing a resistance arising from the application of a test voltage to the first test pattern.
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Citations
16 Claims
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1. A test structure for a semiconductor device, the test structure comprising:
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a first test pattern including a plurality of electrically separated metal patterns;
a plurality of metal vias formed proximate first and second end portions of each one of the plurality of metal patterns forming the first test pattern; and
a second test pattern electrically connected to the first test pattern by the plurality of metal vias, such that a test voltage applied to the first test pattern indicates a resistance that varies in accordance with the presence and nature of a metal failure. - View Dependent Claims (2, 3, 4, 5)
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6. A method of testing a semiconductor device using a test structure,
wherein the test structure comprises; -
a first test pattern including a plurality of electrically separated metal patterns;
a plurality of metal vias formed proximate first and second end portions of each one of the plurality of metal patterns forming the first test pattern; and
a second test pattern electrically connected to the first test pattern by the plurality of metal vias, the method comprising;
applying a test voltage to the first test pattern; and
,detecting the presence of a metal failure in relation to a resistance indicated upon application of the test voltage. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification