Solid state image pickup device

• US 20040263657A1
• Filed: 05/19/2004
• Published: 12/30/2004
• Est. Priority Date: 06/27/2003
• Status: Active Grant

• Current Assignee: Fujifilm Corporation (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Film Co Limited (Fujifilm Holdings Corporation)
• Inventors: Nomura, Yuko, Sakamoto, Tomohiro
• Granted Patent: US 7,244,971 B2
• Time in Patent Office: Days
• US Class Current: 348/311
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers

Abstract

A solid state image pickup device comprising: a semiconductor substrate having a surface layer; charge storage regions disposed in the surface layer; vertical channels disposed in the surface layer adjacent to respective columns of the charge storage regions; vertical transfer electrodes formed above the semiconductor substrate, crossing the vertical channels; a horizontal channel disposed in the surface layer coupled to the vertical channels, having a first portion with transfer stages, each including a barrier region and a well region, and a second portion constituting a gate region with gradually decreasing width, and including an upstream region and a downstream region of different effective impurity concentration, establishing a built-in potential; horizontal transfer electrodes disposed above respective transfer stages of the horizontal channel; an output gate electrode disposed above the gate region; a floating diffusion region disposed in the surface layer coupled to the gate region of the horizontal channel.

Claims

1. A solid state image pickup device comprising:

a semiconductor substrate having a surface layer of a first conductivity type;

a plurality of charge storage regions of a second conductivity type opposite to said first conductivity type disposed in said surface layer in a row and column matrix shape, constituting a plurality of photoelectric conversion elements;

a plurality of vertical channels of the second conductivity type disposed in said surface layer adjacent to respective columns of said charge storage regions;

vertical transfer electrodes formed above the semiconductor substrate, crossing said vertical channels, constituting vertical charge coupled devices;

a horizontal channel of the second conductivity type disposed in said surface layer coupled to said vertical channels, having a first portion with a plurality of transfer stages, each including a barrier region and a well region, and a second portion constituting a gate region with gradually decreasing width, and including an upstream region and a downstream region of different effective impurity concentration, establishing a built-in potential;

horizontal transfer electrodes disposed above respective transfer stages of said horizontal channel;

an output gate electrode disposed above said gate region;

a floating diffusion region of said second conductivity type disposed in said surface layer coupled to said gate region of said horizontal channel, constituting an output element for receiving a signal charge and outputting a voltage signal.

2. The solid state image pickup device according to claim 1, wherein the barrier region of said horizontal channel is doped with impurities of the first conductivity type.

3. The solid state image pickup device according to claim 2, wherein said upstream and downstream regions of different effective impurity concentration are formed by doping impurities of the first conductivity type into the upstream region.

4. The solid state image pickup device according to claim 3, wherein a concentration of the first conductivity type impurity in said barrier region is equal to a concentration of the first conductivity type impurity in the upstream region of said gate region.

5. The solid state image pickup device according to claim 4, wherein each of said horizontal transfer electrodes includes a first level silicon electrode disposed above the well region and a second level silicon electrode disposed above the barrier region.

6. The solid state image pickup device according to claim 5, wherein said output gate electrode includes:

a first silicon electrode made of a same layer as the first level silicon electrode and disposed above a downstream region; and

a second silicon gate electrode made of a same layer as the second level silicon electrode and disposed above the upstream region.

7. The solid state image pickup device according to claim 3, wherein the upstream region has a stripe shape.

8. The solid state image pickup device according to claim 7, wherein the stripe shape is bent to surround said floating diffusion region as viewed in plan.

9. The solid state image pickup device according to claim 1, wherein a last transfer stage of the first portion of said horizontal channel has a well region whose width narrows toward said gate region.

10. The solid state image pickup device according to claim 9, further comprising an impurity doped region doped with impurities of the second conductivity type disposed at a downstream portion of the last well region.

11. The solid state image pickup device according to claim 10, wherein the impurity doped region is formed by doping impurities of the second conductivity type in a region from an intermediate position to an output side end of the well region of the last transfer stage of said first portion.

12. The solid state image pickup device according to claim 11, wherein the impurity doped region and the downstream region are formed by doping impurities of the second conductivity type in a region from an intermediate position of the well region of the last transfer stage of said first portion to an output side end of said second portion of said horizontal channel.

13. The solid state image pickup device according to claim 12, wherein the barrier region of said first portion is doped with impurities of a first conductivity type.

14. The solid state image pickup device according to claim 12, wherein the built-in potential of said gate region is formed by doping impurities of the first conductivity type into the upstream region.

15. The solid state image pickup device according to claim 14, wherein a first conductivity type impurity concentration in the barrier region is equal to the first conductivity type impurity concentration in the upstream region of said gate region.

16. The solid state image pickup device according to claim 15, wherein said horizontal transfer electrodes of said horizontal charge coupled device includes a first level silicon electrode disposed above the well region and a second level silicon electrode disposed above the barrier region and riding above edge of the first level silicon electrode.

17. The solid state image pickup device according to claim 16, wherein said output gate electrode includes:

a first silicon electrode made of a same layer as the first level silicon electrode and disposed above the downstream region; and

a second silicon gate electrode made of a same layer as the second level silicon electrode and disposed above the upstream region.

18. The solid state image pickup device according to claim 14, wherein the upstream region has a stripe shape.

19. The solid state image pickup device according to claim 18, wherein the stripe shape is bent to surround said floating diffusion region as viewed in plan.

20. The solid state image pickup device according to claim 1, wherein the first conductivity type is p-type and the second conductivity type is n-type.

21. The solid state image pickup device according to claim 1, wherein the semiconductor substrate has the second conductivity type, and the semiconductor substrate, the surface layer and the charge storage regions constitute electronic shutter structure.