Patterning of devices

• US 20040266207A1
• Filed: 08/26/2004
• Published: 12/30/2004
• Est. Priority Date: 05/23/2001
• Status: Active Grant

• Current Assignee: FlexEnable Limited (Plastic Logic JSC)
• Original Assignee: Plastic Logic Limited (Plastic Logic JSC)
• Inventors: Sirringhauss, Henning, Cain, Paul Alan
• Granted Patent: US 7,244,669 B2
• Time in Patent Office: Days
• US Class Current: 438/725
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: G03F 7/00 Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor using photoresist structures for special production processes, see the relevant places, e.g. B44C, H01L, e.g. H01L21/00, H05K
• CPC Class Codes: G03F 7/0002 Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
• CPC Class Codes: H01L 21/76894 using a laser, e.g. laser cutting, laser direct writing, laser repair
• CPC Class Codes: H10K 10/464 Lateral top-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 10/468 characterised by the gate dielectrics
• CPC Class Codes: H10K 71/13 using printing techniques, e.g. ink-jet printing or screen printing
• CPC Class Codes: H10K 71/221 by lift-off techniques
• CPC Class Codes: H10K 71/231 by etching of existing layers
• CPC Class Codes: H10K 71/621 Providing a shape to conductive layers, e.g. patterning or selective deposition
• CPC Class Codes: H10K 85/1135 Polyethylene dioxythiophene [PEDOT]; Derivatives thereof
• CPC Class Codes: H10K 85/115 Polyfluorene; Derivatives thereof

Abstract

A method for forming an organic or partly organic switching de-vice, comprising: depositing layers of conducting, semiconducting, insulating, or surface modifying layers by solution processing and direct printing; and defining high-resolution patterns of these layers by exposure to a focussed laser beam.

Claims

1. A method for forming on a substrate an electrical device including at least one patterned layer, the method comprising selectively exposing material on the substrate to a beam of light so as to modify the physical properties of the layer and bring about the patterning of the layer.

2. A method as claimed in claim 1, in which said patterned layer consists of an organic material.

3. A method as claimed in claim 1 or 2, wherein the method comprises selectively exposing a first layer of organic material on the substrate to the beam of light so as to modify the solubility parameters of that layer in the regions exposed to the beam.

4. A method as claimed in claim 3, wherein the solubility parameters of the first layer are modified to render the material insoluble in a solvent in which it was soluble prior to the exposure.

5. A method as claimed in claim 4, comprising the step of washing the first layer of material to remove the material of the first layer in the regions not exposed to the beam.

6. A method as claimed in any of claims 3 to 5, wherein the modification of the solubility parameters comprises causing phase separation of the material of the layer and/or cross-linking of the material of the first layer.

7. A method as claimed in any of claims 1 and 2, wherein the method comprises selectively exposing a first layer of material on the substrate to the beam of light so as to modify the surface free energy of the material of the first layer in the regions exposed to the beam.

8. A method as claimed in claim 7, wherein the first layer is removed from the substrate in localised regions after being exposed to the beam of light so as to uncover the surface of the underlying substrate.

9. A method as claimed in claim 7 or 8, comprising depositing a second layer of organic material on to the first layer, the second layer being deposited from solution in a solvent such that the pattern of deposition of the second layer of material is influenced by the regions of modified surface free energy of the first layer of material.

10. A method as claimed in claim 9, wherein the solvent from which the material of the second layer is deposited is selected so that the material of the second layer is inhibited from being deposited in the regions of modified surface free energy of the first layer of material.

11. A method as claimed in claim 10, wherein the solvent from which the material of the second layer is deposited is selected so that the material of the second layer is inhibited from being deposited in the regions of the first layer of material in which the surface free energy is unmodified by the beam.

12. A method as claimed in any of claims 1 and 2, wherein the method comprises selectively exposing a first layer of material on the substrate to the beam of light so as to remove the material of the first layer in the regions exposed to the beam.

13. A method as claimed in claim 12, wherein the material of the first layer is desorbed and/or evaporated in the regions exposed to the beam.

14. A method as claimed in any of claims 1 and 2, wherein the method comprises contacting a first layer of material on the substrate with a reactive medium and selectively exposing the first layer of material to the beam of light so as to promote a chemical reaction between the material of the first layer and the reactive medium in the regions exposed to the beam.

15. A method as claimed in claim 14, wherein the reactive medium is comprised in the first layer.

16. A method as claimed in claim 14, comprising the step of applying the reactive medium in gas or liquid form to the surface of the first layer.

17. A method as claimed in any of claims 14 to 16, wherein the chemical reaction is such as to modify the solubility and/or surface free energy and/or electrical properties of the material of the first layer in the regions exposed to the beam.

18. A method as claimed in any of claims 1 and 2, wherein the method comprises selectively exposing a first layer of material on the substrate to the beam of light so as to modify the volume of that layer in the regions exposed to the beam.

19. A method as claimed in any preceding claim, wherein the beam is a focussed beam.

20. A method as claimed in any preceding claim, wherein the beam is such as to cause local heating of the first layer in the regions exposed to the beam.

21. A method as in claim 20, wherein the local temperature of the substrate in the region exposed to the beam does not exceed 350°

C. during exposure to the beam.

22. A method as in claim 20, wherein the local temperature of the substrate in the region exposed to the beam does not exceed 200°

C. during exposure to the beam.

23. A method as in claim 20, wherein the local temperature of the substrate in the region exposed to the beam does not exceed 120°

C. during exposure to the beam.

24. A method as in any of the preceding claims, wherein the thickness of the first layer is less than 1 μ

m.

25. A method as claimed in any of claims 1 to 24, wherein the first layer forms a conducting electrode of the electrical device.

26. A method as claimed in any of claims 1 to 24, wherein the first layer forms a semiconducting layer of the electrical device.

27. A method as claimed in any of claims 1 to 24, wherein the first layer forms a dielectric layer of the electrical device.

28. A method as claimed in any of claims 1 to 24, wherein the first layer forms a surface modification layer of the electrical device.

29. A method as claimed in any preceding claim, wherein the beam has a width less than 10, um.

30. A method as claimed in any preceding claim, wherein the beam has a width of less than 1 μ

m.

31. A method as claimed in any preceding claim, wherein the beam is a laser beam.

32. A method as claimed in any preceding claim, wherein the beam is a beam of infra-red light.

33. A method as claimed in any of claims 1 to 31, wherein the beam is of visible light.

34. A method as claimed in any of claims 1 to 31 wherein the beam is of ultraviolet light.

35. A method as claimed in any preceding claim, comprising moving the beam across the first layer to perform the said selective exposing and define a desired pattern.

36. A method as claimed in any preceding claim, wherein the beam is a beam of polarised light.

37. A method as claimed in claim 36, wherein the exposure of the first layer to the beam causes photoalignment of the material of the first layer.

38. A method as claimed in claim 37, wherein the photoalignment of the material of the first layer is simultaneous with the patterning of the first layer.

39. A method as in claim 36 to 38, comprising depositing a second organic layer which acquires an aligned molecular structure in contact with the photoaligned layer.

40. A method as in claim 39, wherein the second organic layer is a liquid-crystalline conjugated polymer layer.

41. A method as claimed in any preceding claim, wherein the first layer is the said patterned layer of the electrical device.

42. A method as claimed in claim 41, wherein the first layer is an active layer of the electrical device.

43. A method as claimed in any of claims 1 to 8 or 12 to 42, comprising depositing a second layer of organic material over the first layer such that the pattern of deposition of the second layer is influenced by the patterning of the first layer.

44. A method as claimed in any of claims 9 to 11 or 43, wherein the second layer is the said patterned layer of the electrical device.

45. A method as claimed in claim 44, wherein the second layer is an active layer of the electrical device.

46. A method as claimed in any of claims 1 to 8 or 12 to 42, comprising exposing a layer of material on a second substrate to a focussed light beam so as to bring about transfer of a pattern of the layer of material onto the first substrate.

47. A method as claimed in claim 46, wherein the layer of material on the second substrate is the said patterned layer of the electrical device.

48. A method as claimed in claim 47, wherein the layer of material on the second substrate is an active layer of the electrical device.

49. A method as claimed in claim 47, in which the layer of material is a surface modification layer.

50. A method as in any preceding claim where the electronic device is an electronic switching device.

51. A method as in any preceding claim wherein the electronic device is a thin film transistor device.

52. A method as claimed in any of the preceding claims in which a portion of the light beam is blocked or attenuated by a previously deposited pattern on the substrate, so as to bring about modification of a layer on the substrate only in the regions in which the light is not blocked or attenuated.

53. A method as claimed in any of claims 1 to 51, in which a portion of the focussed light beam is blocked or attenuated by a previously patterned third layer on the substrate, so as to bring about modification of said first patterned layer on the substrate only in the regions in which the light is blocked or attenuated.

54. A method as claimed in any of claims 51 to 53, in which said previously deposited third layer forms the source and drain electrodes of an electronic switching device.

55. A method as claimed in claim 54, in which said first layer forms the gate electrode of an electronic switching device.

56. A method as claimed in any-of claims 51 to 54, in which said first layer is a surface modification layer.

57. A method as claimed in claim 56, comprising the additional step of depositing further material onto said surface modification layer so as to confine the deposition of such additional material to the region in which the light beam was blocked or attenuated.

58. A method as claimed in claim 56, comprising the additional step of depositing further material onto said surface modification layer so as to confine the deposition of such additional materials to the region in which the light beam was not blocked or attenuated.

59. A method for defining an integrated circuit, comprising moving a substrate relative to a patterning light beam so as to define a first one-dimensional pattern on the substrate by means of the beam.

60. A method as in claim 59 wherein the first one-dimensional pattern is defined by of regions with different surface free energy.

61. A method as in claim 60, wherein a second pattern of material is deposited in registration with the first one-dimensional pattern.

62. A method as in claim 61, wherein the second pattern of material is deposited by a direct printing technique.

63. A method as in claim 62, wherein the second pattern is deposited by inkjet printing.

64. A method as in claim 61, wherein the second pattern is deposited by dipping the substrate into a solution of the second material.

65. A method as claimed in any of claims 61 to 64, wherein the second pattern is substantially more complex than the first one-dimensional pattern.

70. A method as claimed in any of claims 59 to 69, wherein the beam is generated by a patterning head.

71. A method as claimed in claim 70, wherein the patterning head generates a plurality of beams spaced apart in a direction normal to the said straight line, and the method comprises exposing the substrate to the beams.

72. A method as claimed in any of claims 59 to 71, comprising modulating the beam or beams during the movement.

73. A method as claimed in any of claims 59 to 72, wherein the beam or beams are focussed beams.

74. A method as claimed in any of claims 59 to 73, wherein the beam or beams are laser beams.

75. A method as claimed in any of claims 59 to 74, wherein the width of the beam or beams is less than 10 Nm.

76. A method as claimed in any of claims 59 to 75, wherein the width of the beam or beams is less than 1, um.

66. A method for defining an integrated circuit, comprising moving a substrate having a set of circuit features on it relative to a patterning light beam so as to modify the circuit features by means of the beam.

67. A method as claimed in any of claim 66, wherein the modification of the circuit features comprises removing electrical connections between the circuit features.

68. A method as claimed in any of claims 66, wherein the modification of the circuit features comprises creating electrical connections between the circuit features.

69. A method as claimed in claim 66, wherein the modification of circuit features consists in defining the channels between the source and drain electrodes of an array of transistor devices.

77. A method for determining the relative alignment of a feature on a substrate and an optical reading head, the substrate bearing a set of optically detectable alignment marks comprising a first straight line, a second straight line spaced from and parallel to the first line, and third straight line spaced from and at a predetermined angle to the first line, and the alignment marks having a predetermined offset from the feature;

the method comprising;

scanning the reading head relative to the substrate in a straight scanning dine so as to determine the distance along the scanning line between the first line and the second line and the distance along the scanning line between the first line and the third line; and

determining the relative location of the reading head and the feature by means of the determined distances and the offset.

78. A method as claimed in claim 77, wherein the step of determining the relative location of the reading head and the feature is executed according to the relationships:

79. A method as claimed in claim 77 or 78, wherein the reading head is integrated with a material processing unit.

80. A method as claimed in claim 79, wherein the material processing unit is one of a deposition unit and a light beam generation unit.

81. A method as claimed in any of claims 77 to 80, wherein the feature is a generally linear feature.

82. A method as claimed in claim 81, wherein the feature is generally perpendicular to the first line.

83. A method as claimed in any of claims 77 to 82, wherein the first, second and third lines are defined by at least one linear zone of optical contrast change on the substrate.

90. A method as claimed in any of claims claim 77 to 89, wherein the substrate is a flexible substrate.

91. A method as claimed in any of claims 79 to 90, wherein the material processing unit is an inkjet printing head.

92. A method as claimed in any of claims 77 to 91, wherein the alignment marks comprise a first straight line, a second straight line spaced from and parallel to the first line, and third straight line spaced from and at a predetermined angle to the first line, and the alignment marks having a predetermined offset from he feature, and the process of registration comprises detection of a series of optical signals by the reading head.

84. A method for fabricating an electronic circuit device on a substrate that contains an array of features each with corresponding alignment marks, the method comprising performing a local registration step in respect of at least two of the features on the substrate, and each local registration step comprising determining the relative position of the respective feature with respect to a material processing unit by scanning a reading head in a straight line across the alignment mark corresponding to that feature.

85. A method as claimed in claim 84, wherein there is a fixed spatial relationship between the material processing unit and the reading head.

86. A method as claimed in claim 85, wherein the reading head is integral with the material processing unit.

87. A method as claimed in any of claims 84 to 86, wherein each local registration step is followed by a material deposition step comprising depositing material on to the substrate from the material processing unit.

88. A method as claimed in any of claims 84 to 87, wherein each local registration step is followed by a material processing deposition step comprising processing material on the substrate by means of the material processing unit.

89. A method as claimed in claim 87 or 88, wherein the material is deposited or processed at a predetermined spatial offset from the respective alignment mark.

93. A method of producing a patterned layer on a substrate, including the steps of:

forming on the substrate a patternable layer including a curable material; and

using a laser to cure the curable material to form an imaged layer;

wherein the patternable layer also includes a dye and the method includes using the dye and laser to raise the temperature of the patternable layer to a temperature at which both the curable material is cured and the dye is substantially bleached.

94. A method according to claim 93, further including the step of exposing the imaged layer to a solvent that selectively dissolves uncured portions of the imaged layer.

97. A method, composition or patternable medium according to any of claims 93 to 96, wherein the dye has an absorption peak at about 830 nm.

98. A method according to claim 93, wherein curable material is cured by a cross-linking reaction.

99. A method according to claim 93, wherein the curable material comprises a polyimide precursor material.

100. A method according to claim 93, wherein the imaged layer provides a surface energy pattern.

95. A composition for a patternable layer, including (i) a material which is curable upon heating to a curing temperature, and (ii) a dye that is substantially bleached at said curing temperature.

96. A patternable medium including a substrate and formed on said substrate a layer of a composition according to claim 95.