Programmable logic controller with an extra memory
First Claim
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1. A programmable logic controller with an extra memory, comprising:
- a PLC, comprising at least a memory storing a plurality of data codes and an indicating instruction, and a CPU for reading and executing the data codes;
a data bus, connecting electrically to the CPU; and
an extra memory, connecting to the data bus, comprising at least a data code;
wherein after the indicating instruction stored in the memory has been read, the CPU reads the address of the extra memory to execute the data code stored in the extra memory.
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Abstract
A programmable logic controller connects to an extra memory by a data bus. The memory of the PLC stores an indicating instruction. As the CPU of the PLC reads the indicating instruction, then the CPU reads the address of the extra memory to execute the data codes stored in the extra memory. Thus the programmable logic controller with an extra memory updates or expands the data codes in the extra memory effectively without changing the memory inside the PLC.
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Citations
6 Claims
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1. A programmable logic controller with an extra memory, comprising:
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a PLC, comprising at least a memory storing a plurality of data codes and an indicating instruction, and a CPU for reading and executing the data codes;
a data bus, connecting electrically to the CPU; and
an extra memory, connecting to the data bus, comprising at least a data code;
wherein after the indicating instruction stored in the memory has been read, the CPU reads the address of the extra memory to execute the data code stored in the extra memory. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification