Feedforward, feedback wafer to wafer control method for an etch process

• US 20040267399A1
• Filed: 06/30/2003
• Published: 12/30/2004
• Est. Priority Date: 06/30/2003
• Status: Active Grant

• Current Assignee: Tokyo Electron Limited
• Original Assignee: Tokyo Electron Limited
• Inventors: Funk, Merritt
• Granted Patent: US 7,158,851 B2
• Time in Patent Office: Days
• US Class Current: 700/121
• CPC Class Codes: G05B 19/41875 characterised by quality surveillance of production
• CPC Class Codes: G05B 2219/31265 Control process by combining history and real time data
• CPC Class Codes: G05B 2219/32195 Feedforward quality control
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A method of using a run-to-run (R2R) controller to provide wafer-to-wafer (W2W) control in a semiconductor processing system is provided. The R2R controller includes a feed-forward (FF) controller, a process model controller, a feedback (FB) controller, and a process controller. The R2R controller uses feed-forward data, modeling data, feedback data, and process data to update a process recipe on a wafer-to-wafer time frame.

Claims

1. A method of operating a semiconductor processing system comprising:

determining a first state for a wafer;

determining a second state for the wafer;

determining a process recipe to change the state of the wafer from the first state to the second state;

performing the process recipe on the wafer, wherein the state of the wafer changes from the first state to a processed state;

determining when the processed state is not the second state; and

updating the process recipe.

2. The method of operating a semiconductor processing system as claimed in claim 1, wherein the determining of the first state comprises measuring at least one of an optical property, an electrical property, and a physical property.

3. The method of operating a semiconductor processing system as claimed in claim 1, wherein the determining of the first state comprises receiving at least one of optical data, electrical data, and physical data.

4. The method of operating a semiconductor processing system as claimed in claim 1, wherein the determining of the second state comprises measuring at least one of an optical property, an electrical property, and a physical property.

5. The method of operating a semiconductor processing system as claimed in claim 1, wherein the determining of the second state for a wafer comprises receiving at least one of optical data, electrical data, and physical data.

6. The method of operating a semiconductor processing system as claimed in claim 1, wherein the determining of the process recipe comprises feeding forward at least one process recipe based on the first and second state of the wafer.

7. The method of operating a semiconductor processing system as claimed in claim 1, wherein the determining of the process recipe comprises predicting the second state using the first state of the wafer and a process model based on the process conditions.

8. The method of operating a semiconductor processing system as claimed in claim 1, further comprising:

determining differences between the processed state and the second state; and

feeding back the differences.

9. A method of operating a semiconductor processing system comprising:

determining a first state for a wafer;

determining a second state for the wafer;

determining a predicted state for the wafer, wherein a predicted process recipe is used to change the state of the wafer from the first state to the predicted state;

determining a modeled state for the wafer, wherein a process module is used to change the state of the wafer from the first state to the modeled state;

determining a measured state for the wafer, and

determining a recipe for changing the wafer state to the second state using the first state, the predicted state, the modeled state, and the measured state.