Closed-grid bus architecture for wafer interconnect structure
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Accused Products
Abstract
An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board. A set of spring contacts or probes link each contact pad to a separate one of the I/O pads on the wafer.
63 Citations
41 Claims
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1-14. -14. (Canceled)
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15. :
- An apparatus for providing electrically conductive paths for test signals, said apparatus comprising;
a first substrate a first electrical interface disposed on said first substrate;
a second electrical interface disposed on said first substrate, said second electrical interface electrically connected to said first electrical interface, said first electrical interface and said second electrical interface comprising electrically conductive paths for said test signals through said first substrate; and
a thin film resistor disposed in one of said conductive paths. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
- An apparatus for providing electrically conductive paths for test signals, said apparatus comprising;
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28. :
- An apparatus for distributing test signals, said apparatus comprising;
distributing means for distributing a test signal received from a tester for one input terminal of a device under test to a plurality of input terminals; and
isolating means for electrically isolating one of said input terminals from another of said input terminals, wherein said isolating means comprises a thin film resistor disposed on said distributing means. - View Dependent Claims (29, 30, 31, 32)
- An apparatus for distributing test signals, said apparatus comprising;
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33. :
- A method of making an apparatus for distributing test signals, said method comprising;
providing a substrate;
disposing on said substrate a trace configured to receive a test signal;
electrically connecting a plurality of contact elements to said trace, each said contact element disposed to make an electrical connection with an input terminal of a device under test; and
disposing a plurality of thin film resistors on said substrate, each said thin film resistor disposed in an electrical path between said trace and one of said contact elements. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41)
- A method of making an apparatus for distributing test signals, said method comprising;
Specification