CMOS active pixel sensor with a sample and hold circuit having multiple injection capacitors and a fully differential charge mode linear synthesizer with skew control
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Abstract
An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.
12 Citations
29 Claims
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1-17. -17. (canceled).
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18. An apparatus for correcting for an unwanted offset voltage from a pixel in an CMOS active pixel sensor array, comprising:
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an offset correction block for receiving a digital correctional value and outputting an analog correction signal; and
a sample-and-hold circuit, said sample-and-hold circuit further comprising a charge amplifier having a first input coupled to a first set of capacitors charged by an electrical signal produced by said pixel and a second input coupled to a second set of capacitors charged by the analog correction signal, and outputting a compensated signal as a linear function of the charge on said first and second sets of capacitors. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29-41. -41. (canceled).
Specification