Microelectronic package

• US 20050002167A1
• Filed: 07/02/2003
• Published: 01/06/2005
• Est. Priority Date: 07/02/2003
• Status: Abandoned Application

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chen, Kuo-Ming, Hsuan, John, Chen, Kow-Bao, Liu, Hung-Min, Ho, Kai-Kuang
• Application Number:
  US10/610,638
• Publication Number:
  US 20050002167A1
• Time in Patent Office: Days
• US Class Current: 361/760
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/16265 the item being a discrete passive component
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/165 Containers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15159 : Side view
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19103 : interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
• CPC Class Codes: H01L 2924/19104 : on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H05K 1/023 : using auxiliary mounted passive components or auxiliary substances printed passive components H05K1/16
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components

Abstract

An improved microelectronic package is disclosed. The microelectronic package includes a packaging substrate having an upper surface and an underside. At least one chip is mounted on the upper surface of the packaging substrate. A plurality of ball grid array (BGA) solder balls are mounted at the underside of the packaging substrate. At least one RC passive component is disposed underneath the chip. The chip may be mounted on predetermined position on the upper surface of the packaging substrate with solder bumps by using Flip-Chip (FC) assembly method. According to one aspect of the present invention, the RC passive component is disposed between the BGA solder balls. According to one aspect of the present invention, the RC passive component is an adjustable resist having a plurality of bumps formed thereon, and wherein two metal trace lines, which correspond to two bumps of the plural bumps, are provided on the underside of the packaging substrate. The distance between the two metal trace lines determines the resistance value of the adjustable resist.

Claims

1. A microelectronic package, comprising:

a packaging substrate comprising an upper surface and an underside;

at least one chip mounted on the upper surface of the packaging substrate;

a plurality of ball grid array (BGA) solder balls mounted at the underside of the packaging substrate; and

at least one RC passive component disposed at the underside of the packaging substrate.

2. The microelectronic package as claimed in claim 1 wherein the chip is mounted on predetermined position on the upper surface of the packaging substrate with solder bumps by using Flip-Chip (FC) assembly method.

3. The microelectronic package as claimed in claim 1 wherein the chip is mounted on the upper surface of the packaging substrate by surface mounting technique (SMT) and is electrically connected with the packaging substrate by wire bonding.

4. The microelectronic package as claimed in claim 1 wherein the RC passive component is disposed between the BGA solder balls.

5. The microelectronic package as claimed in claim 1 wherein the RC passive component is located underneath the chip.

6. The microelectronic package as claimed in claim 1 wherein the packaging substrate is a two-layer substrate having two metal wiring layers printed on respective upper surface and the underside of the packaging substrate, and a plurality of vias in the packaging substrate for electrically connecting the two metal wiring layers.

7. The microelectronic package as claimed in claim 1 wherein the RC passive component is an adjustable resist having a plurality of bumps formed thereon, and wherein two metal trace lines, which correspond to two bumps of the plural bumps, are provided on the underside of the packaging substrate, and wherein the distance between the two metal trace lines determines the resistance value of the adjustable resist.

8. The microelectronic package as claimed in claim 1 wherein the packaging substrate further comprises a recess provided at the underside, and the RC passive component is located within the recess.

9. The microelectronic package as claimed in claim 8 wherein the recess comprises a bottom surface and the RC passive component is mounted on the bottom surface of the recess by SMT.

10. A microelectronic package, comprising:

a packaging substrate comprising an upper surface and an underside;

at least one chip mounted on the upper surface of the packaging substrate;

a plurality of ball grid array (BGA) solder balls mounted at the underside of the packaging substrate; and

at least one RC passive component disposed underneath the chip.

11. The microelectronic package as claimed in claim 10 wherein the packaging substrate further comprises a recess provided on the upper surface, and wherein the chip and the RC passive component are disposed within the recess.

12. The microelectronic package as claimed in claim 11 wherein the RC passive component is mounted on a bottom of the chip by surface mounting technique (SMT).

13. The microelectronic package as claimed in claim 10 wherein the chip is mounted on predetermined position on the upper surface of the packaging substrate with solder bumps by using Flip-Chip (FC) assembly method.

14. The microelectronic package as claimed in claim 10 wherein the chip is mounted on the upper surface of the packaging substrate by SMT and is electrically connected with the packaging substrate by wire bonding.

15. The microelectronic package as claimed in claim 10 wherein the RC passive component is mounted on the underside of the packaging substrate.

16. The microelectronic package as claimed in claim 10 wherein the RC passive component is disposed between the BGA solder balls.

17. The microelectronic package as claimed in claim 10 wherein the packaging substrate is a two-layer substrate having two metal wiring layers printed on respective upper surface and the underside of the packaging substrate, and a plurality of vias in the packaging substrate for electrically connecting the two metal wiring layers.

18. The microelectronic package as claimed in claim 10 wherein the RC passive component is an adjustable resist having a plurality of bumps formed thereon, and wherein two metal trace lines, which correspond to two bumps of the plural bumps, are provided on the underside of the packaging substrate, and wherein the distance between the two metal trace lines determines the resistance value of the adjustable resist.

19. The microelectronic package as claimed in claim 10 wherein the packaging substrate further comprises a recess provided at the underside, and the RC passive component is located within the recess.

20. The microelectronic package as claimed in claim 19 wherein the recess comprises a bottom surface and the RC passive component is mounted on the bottom surface of the recess by SMT.