Digital baseband receiver with DC discharge and gain control circuits

• US 20050003777A1
• Filed: 04/27/2004
• Published: 01/06/2005
• Est. Priority Date: 06/06/2003
• Status: Active Grant

• Current Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Original Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Inventors: Kazakevich, Leonid, Demir, Alpaslan, Ozluturk, Fatih, Narayan, Geetha Lakshmi
• Granted Patent: US 7,280,812 B2
• Time in Patent Office: Days
• US Class Current: 455/205
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A method for manufacturing a plurality or metal core substrates for a surface-mounted light emitting diode includes steps of adhering a pair of metal base plates and a plurality of insulation layers, adhering a pair of metal base plates interposing one of the insulation layers as a first insulation layer to form a set plate, stacking a plurality of set plates between a pair of guide plates, interposing a separation gap between adjacent set plates to form a set plate block, cutting the set plate block in a stacking direction to form a set plate aggregation, securing a second insulation layer to a cut surface of the set plate aggregation, securing a circuit pattern aggregation layer to the second insulation layer to form a metal core substrate aggregation, forming a separation groove on the circuit pattern aggregation layer between adjacent set plates, corresponding to the separation gap, forming a groove along a center line of the set plate to separate the set plate into first and second circuit pattern aggregations, forming electrodes on both sides of the substrate aggregation, separating the guide plates, and cutting off the substrate aggregation into independent substrates.

Claims

1-5. -5. (canceled)

6. A method for manufacturing a plurality or metal core substrates for a surface-mounted light emitting diode, comprising the steps of:

preparing a plurality of metal base plates and a plurality of insulation layers;

adhering a pair of metal base plates and a plurality of insulation layers;

adhering a pair of metal base plates interposing one of the insulation layers as a first insulation layer to form a set plate;

stacking a plurality of set plates at a position between a pair of guide plates, interposing a separation gap between adjacent set plates to form a set plate block;

cutting the set plate block in a stacking direction along lines corresponding to a predetermined height of the metal base to form a set plate aggregation;

securing a second insulation layer to a cut surface of the set plate aggregation;

securing a circuit pattern aggregation layer to the second insulation layer to form a metal core substrate aggregation;

forming a separation groove on the circuit pattern aggregation layer between adjacent set plates, corresponding to the separation gap;

forming a groove along a center line of the set plate to separate the set plate into first and second circuit pattern aggregations;

forming electrodes on both sides of the substrate aggregation;

separating the guide plates; and

cutting off the substrate aggregation into independent substrates.

7. A method according to claim 6, further comprising a step of forming a plurality of through-holes in each of the circuit pattern aggregations.

8. A method for manufacturing a plurality or metal core substrates for a surface-mounted light emitting diode, comprising the steps of:

preparing a plurality of metal base plates and a plurality of insulation layers;

adhering a pair of metal base plates interposing one of the insulation layers as a first insulation layer by thermocompression to form a set plate;

stacking a plurality of set plates at a position between a pair of guide plates, interposing a separation gap between adjacent set plates to form a set plate block;

cutting the set plate block in a stacking direction along lines corresponding to a predetermined height of the metal base to form a set plate aggregation;

securing a second insulation layer to a cut surface of the set plate aggregation to form a metal core substrate aggregation;

forming an electrolytic gold plating surface on the metal core substrate aggregation.