Card reader/writer devices and methods

• US 20050006471A1
• Filed: 06/03/2004
• Published: 01/13/2005
• Est. Priority Date: 06/09/2003
• Status: Active Grant

• Current Assignee: Brush Industries, Inc.
• Original Assignee: Brush Industries, Inc.
• Inventors: Bonneau, Walter C. Jr., Ditty, Larry W., Schindler, Terry, Bedell, Edwin A. Jr.
• Granted Patent: US 7,255,272 B2
• Time in Patent Office: Days
• US Class Current: 235/440
• CPC Class Codes: G06K 7/0004 Hybrid readers

Abstract

Card reader/writer devices and methods for reading/writing both M-cards, PICCs, and/or S-cards, wherein such devices can comprise a magnetic head (which can have multiple tracks), an A/D converter, a gated buffer module associated with the A/D converter, an F2F decoder associated with the gated buffer module for enabling the integration of multiple discrete M-card reader formats with decoder functions, and an integral PICC data processor, which can perform the functions of a PCD, for reading/writing a PICC along with the M-card. An internal RF analog antenna circuit can be provided for receiving signals from the PICC, or an external PCD antenna can be connectable to the RF circuit. The F2F decoder can be integrated with the PICC data processor, and the A/D converter can process analog data from both the magnetic head and the RF antenna circuit. A contact module could also be provided to read/write an S-card.

Claims

1. A card reader/writer device comprising:

a. a magnetic head having at least one track;

b. an A/D converter receiving input from at least said at least one track;

c. a gated buffer module accepting input corresponding to data from both a magnetic card and at least one of a PICC and a smart card, said input receivable from at least one of said A/D converter and a PCD; and

d. an F2F decoder receiving input from said gated buffer module, said input corresponding to data from said magnetic card.

2. The device of claim 1 further comprising said gated buffer module detecting magnetic card activity and at least one of PICC and smart card activity, and said gated buffer module managing contention therebetween.

3. The device of claim 2 further comprising said gated buffer module managing said contention therebetween by preempting one of said magnetic card activity and said at least one of said PICC and smart card activity, and permitting the other activity to continue.

4. The device of claim 1 wherein said PCD further comprises an external PCD communicable with said gated buffer module.

5. The device of claim 1 further comprising;

a. a PICC data processor receiving input from said gated buffer module;

b. an internal RF analog antenna circuit receiving input from said PICC, said PICC data processor and said RF analog antenna circuit functioning as an internal PCD and PCD antenna;

c. said A/D converter also receiving input from said internal RF antenna; and

d. said gated buffer module receiving input from said A/D converter, said input from said A/C converter corresponding to data from both said at least one track and said PICC.

6. The device of claim 5 further comprising said F2F decoder integrated with said PICC data processor.

7. The device of claim 1 further comprising;

a. a PICC data processor receiving input from said gated buffer module, said PICC data processor functioning as an internal PCD;

b. an external RF antenna for communicating data from said PICC to said A/D converter; and

c. said gated buffer module receiving input from said A/D converter, said input from said A/D converter corresponding to data from both said at least one track and said PICC.

8. The device of claim 7 further comprising said F2F decoder integrated with said PICC data processor.

9. The device of claim 1 further comprising one of an integral contact module and an external contact module connectable to said A/D converter, said contact module communicating data between a smart card and said A/D converter.

10. The device of claim 1 further comprising a serial interface controller.

11. The device of claim 1 further comprising a crypto/security unit.

12. The device of claim I further comprising:

a. said magnetic head having a plurality of tracks;

b. said A/D converter receiving input from each of said plurality of tracks;

c. said gated buffer module receiving input from said A/D converter; and

d. said F2F decoder receiving input from said gated buffer module, said F2F decoder selectable to decode each of said plurality of tracks.

13. A multi-track magnetic head device comprising:

a. a magnetic head having a plurality of tracks;

b. an A/D converter receiving input from each of said plurality of tracks;

c. a gated buffer module receiving input from said A/D converter; and

d. an F2F decoder receiving input from said gated buffer module, said F2F decoder selectively decoding each of said plurality of tracks.

14. The device of claim 13 further comprising at least one of said A/D converter and said gated buffer module receiving input from at least one of a PICC and a smart card.

15. The device of claim 14 further comprising said gated buffer module detecting magnetic card activity and activity of at least one of said PICC and said smart card, and said gated buffer module managing contention therebetween.

16. The device of claim 15 further comprising said gated buffer module managing said contention therebetween by preempting one of said magnetic card activity and said activity of at least one of said PICC and said smart card and permitting the other activity to continue.

17. The device of claim 14 further comprising said gated buffer module receiving said input from said PICC via an external PCD communicable with said gated buffer module.

18. The device of claim 14 further comprising:

a. an internal RF analog antenna circuit;

b. a PICC data processor, said internal RF analog antenna circuit and said PICC data processor functioning as an internal PCD;

c. said A/D converter receiving input from said internal RF analog antenna circuit, said input including input from said PICC; and

d. said gated buffer module receiving input from said A/D converter, said input including input from both said plurality of magnetic tracks and said PICC, said gated buffer module communicating with said PICC data processor.

19. The device of claim 18 further comprising said F2F decoder integrated with said PICC data processor.

20. The device of claim 14 further comprising:

a. a PICC data processor functioning as an internal PCD;

b. an external RF antenna;

c. said A/D converter receiving input from said external RF antenna, said input including input from said PICC; and

d. said gated buffer module receiving input from said A/D converter, said input corresponding to input from both said plurality of magnetic tracks and said PICC.

21. The device of claim 20 further comprising said F2F decoder integrated with said PICC data processor.

22. The device of claim 14 further comprising one of an internal contact module and an external contact module connectable to said A/D converter, said contact module communicating data between a smart card and said A/D converter.

23. The device of claim 13 further comprising a serial interface controller.

24. The device of claim 13 further comprising a crypto/security unit.

25. A method for multiple card input acceptance comprising:

a. accepting input from at least one magnetic track and at least one of a PICC and a smart card;

b. processing said input from each of said at least one magnetic track and said at least one of said PICC and said smart card; and

c. selectively decoding said input from each of said at least one magnetic track.

26. The method of claim 25 further comprising managing contention between input from said at least one magnetic track and input from said at least one of said PICC and said smart card.

27. The method of claim 26, wherein said managing contention further comprises preempting one of said input from said magnetic track and said input from said at least one of said PICC and said smart card.

28. The method of claim 25 further comprising decrypting said input from each of said at least one magnetic track and said at least one of said PICC and said smart card.

29. The method of claim 25 wherein:

a. said at least one magnetic track further comprises a plurality of magnetic tracks; and

b. selectively decoding input from each of said plurality of magnetic tracks.

30. The method of claim 29 further comprising integrating a multiple track magnetic head with an F2F decoder.

31. The method of claim 30 further comprising integrating an F2F decoder with a PICC data processor, said PICC data processor performing proximity coupling and digital signal processing associated with said PICC.

32. The method of claim 31 further comprising associating an RF analog antenna circuit with said PICC data processor.

33. The method of claim 25 further comprising combining A/D conversion of analog data from a magnetic track and analog data from a an analog RF antenna circuit communicating with a PICC.

34. A card reader/writer device comprising:

a. a magnetic head having at least one track for receiving input from a magnetic card;

b. an internal RF analog antenna circuit for receiving input from a PICC;

c. an A/D converter receiving input from at least said at least one track and said internal RF analog antenna circuit;

d. a gated buffer module receiving input from said A/D converter, said input corresponding to data from both said magnetic card and said PICC;

e. a PICC data processor receiving input from said gated buffer module, said PICC data processor and said RF analog antenna circuit functioning as an internal PCD and PCD antenna; and

f. an F2F decoder receiving input from said gated buffer module, said input corresponding to data from said magnetic card.

35. The device of claim 34 further comprising said gated buffer module detecting magnetic card activity and at least one of PICC and smart card activity, and said gated buffer module managing contention therebetween.

36. The device of claim 35 further comprising said gated buffer module managing said contention therebetween by preempting one of said magnetic card activity and said at least one of said PICC and smart card activity and permitting the other activity to continue.

37. The device of claim 34 further comprising said F2F decoder integrated with said PICC data processor.

38. The device of claim 34 further comprising one of an integral contact module and an external contact module connectable to said A/D converter, said contact module communicating data between a smart card and said A/D converter.

39. The device of claim 34 further comprising a serial interface controller.

40. The device of claim 34 further comprising a crypto/security unit.

41. The device of claim 34 further comprising:

a. said magnetic head having a plurality of tracks;

b. said A/D converter receiving input from each of said plurality of tracks;

c. said gated buffer module receiving input from said A/D converter; and

d. said F2F decoder receiving input from said gated buffer module, said F2F decoder selectable to decode each of said plurality of tracks.