Devices containing platinum-iridium films and methods of preparing such films and devices

• US 20050006689A1
• Filed: 08/06/2004
• Published: 01/13/2005
• Est. Priority Date: 08/31/2000
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Marsh, Eugene P.
• Granted Patent: US 7,217,970 B2
• Time in Patent Office: Days
• US Class Current: 257/306
• CPC Class Codes: C23C 16/06 characterised by the deposition of metallic material
• CPC Class Codes: C23C 16/18 from metallo-organic compounds
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76864 Thermal treatment
• CPC Class Codes: H01L 21/7687 Thin films associated with contacts of capacitors
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 28/65 comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)

Abstract

Methods for forming platinum-iridium films, particularly in the manufacture of a semiconductor device, and devices (e.g., capacitors, integrated circuit devices, and memory cells) containing such films.

Claims

1-19. -19. Cancelled

20. A capacitor comprising:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material;

wherein at least one of the first and second layers comprises a vapor-deposited platinum-iridium film.

21. The capacitor of claim 20 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

22. The capacitor of claim 21 wherein x is in the range of about 0.65 to about 0.85.

23. The capacitor of claim 22 wherein x is about 0.75.

24. The capacitor of claim 21 wherein the dielectric layer is selected from the group consisting of tantalum pentoxide, Barium Strontium Titanate, Strontium Titanate, Lead Zirconium Titanate, Strontium Bismuth Tantalate, and Bismuth Zirconium Titanate.

25. A capacitor comprising:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material; and

a conductive barrier layer comprising a vapor-deposited platinum-iridium film.

26. The capacitor of claim 25 wherein the first conductive layer forms an electrode and is interposed between the dielectric material and the barrier layer.

27. The capacitor of claim 26 wherein the barrier layer is interposed between the dielectric material and the first conductive layer.

28. The capacitor of claim 25 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

29. The capacitor of claim 28 wherein x is in the range of about 0.65 to about 0.85.

30. The capacitor of claim 29 wherein x is about 0.75.

31. An integrated circuit comprising a capacitor, wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material;

wherein at least one of the first and second conductive layers comprises a vapor-deposited platinum-iridium film.

32. The integrated circuit of claim 31 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

33. The integrated circuit of claim 32 wherein x is in the range of about 0.65 to about 0.85.

34. The integrated circuit of claim 33 wherein x is about 0.75.

35. The integrated circuit of claim 31 wherein the dielectric layer is selected from the group consisting of tantalum pentoxide, Barium Strontium Titanate, Strontium Titanate, Lead Zirconium Titanate, Strontium Bismuth Tantalate, and Bismuth Zirconium Titanate.

36. An integrated circuit comprising a capacitor, wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer;

a second conductive layer on the dielectric material; and

a conductive barrier layer comprising a vapor-deposited platinum-iridium film.

37. The integrated circuit of claim 36 wherein the first conductive layer forms an electrode and is interposed between the dielectric material and the barrier layer.

38. The integrated circuit of claim 36 wherein the barrier layer is interposed between the dielectric material and the first conductive layer.

39. The integrated circuit of claim 36 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

40. The integrated circuit of claim 39 wherein x is in the range of about 0.65 to about 0.85.

41. The integrated circuit of claim 40 wherein x is about 0.75.

42. A memory cell comprising a transistor and a capacitor comprising a barrier layer comprising a vapor-deposited platinum-iridium film.

43. The memory cell of claim 42 wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer;

a second conductive layer on the dielectric material; and

a barrier layer comprising a vapor-deposited platinum-iridium film.

44. The memory cell of claim 43 wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material;

wherein at least one of the first and second layers comprises a vapor-deposited platinum-iridium film.

45. The memory cell of claim 43 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

46. The memory cell of claim 45 wherein x is in the range of about 0.65 to about 0.85.

47. The memory cell of claim 46 wherein x is about 0.75.

48-80. -80. Cancelled