Method of fabrication of an infrared radiation detector and infrared detector device

• US 20050012040A1
• Filed: 08/17/2004
• Published: 01/20/2005
• Est. Priority Date: 03/28/1997
• Status: Active Grant

• Current Assignee: Interuniversitair Micro-Electronica Centrum VZW (IMEC International)
• Original Assignee: Interuniversitair Micro-Electronica Centrum VZW (IMEC International)
• Inventors: Fiorini, Paolo, Sedky, Sherif, Caymax, Matty, Baert, Christiaan
• Granted Patent: US 7,075,081 B2
• Time in Patent Office: Days
• US Class Current: 250/338.400
• CPC Class Codes: B81C 1/00666 Treatments for controlling internal stress or strain in MEMS structures
• CPC Class Codes: B81C 2201/017 Methods for controlling internal stress of deposited layers not provided for in B81C2201/0164 - B81C2201/0169
• CPC Class Codes: G01J 5/20 using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
• CPC Class Codes: H01L 31/09 Devices sensitive to infrared, visible or ultraviolet radiation H01L31/101 takes precedence
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.

Claims

1-20. -20. (canceled)

21. A method of controlling an internal stress in a polycrystalline silicon-germanium layer deposited on a substrate, the method comprising:

selecting a deposition pressure that is at or below atmospheric pressure; and

selecting a deposition temperature that is no greater than 700°

C.;

wherein the deposition pressure and the deposition temperature are selected so as to achieve an internal stress in the silicon-germanium layer that is within a predetermined range.

25. The method of claim 21, wherein the deposition pressure is approximately 40 torrs.

26. The method of claim 21, further comprising modifying the deposition temperature.

27. The method of claim 26, wherein the deposition temperature is between 600°

C. and 700°

C.

28. The method of claim 26 wherein the deposition temperature is approximately 650°

C.

22-24. -24. (canceled)

29. A method of depositing a silicon-germanium layer, the method comprising:

depositing a sacrificial layer on a substrate;

depositing a silicon-germanium layer on said sacrificial layer; and

removing at least a portion of said sacrificial layer from under said silicon-germanium layer.

30. The method of claim 29, wherein the sacrificial layer comprises an oxide layer.

31. The method of claim 30, wherein the oxide layer comprises a silicon-oxide layer.

32. The method of claim 30, wherein the silicon-oxide layer comprises a thermal oxide.

33. The method of claim 29, wherein the silicon-germanium layer is deposited at a deposition temperature between 600°

C. and 700°

C.

34. The method of claim 33, wherein the deposition temperature is approximately 650°

C.

35. The method of claim 33, wherein the silicon-germanium layer is deposited at atmospheric pressure.

36. The method of claim 33, wherein the silicon germanium layer is deposited at a pressure below atmospheric pressure.

37. The method of claim 29, wherein a deposition pressure and a deposition temperature for the silicon-germanium layer are selected so as to achieve an internal stress in the silicon-germanium layer that is within a predetermined range.