Semiconductor device and its manufacturing method

• US 20050012187A1
• Filed: 07/16/2004
• Published: 01/20/2005
• Est. Priority Date: 07/16/2003
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Kanto Sanyo Semiconductors Company Limited (Panasonic Holdings Corporation), Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Kameyama, Koujiro, Mita, Kiyoshi
• Granted Patent: US 7,264,997 B2
• Time in Patent Office: Days
• US Class Current: 257/676
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/68331 of passive members, e.g. die mounting substrate
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18301 : being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
• CPC Class Codes: H05K 2201/09154 : Bevelled, chamferred or tapered edge
• CPC Class Codes: H05K 2201/10772 : Leads of a surface mounted component bent for providing a gap between the lead and the pad during soldering
• CPC Class Codes: H05K 2201/10931 : Exposed leads, i.e. encapsulation of component partly removed for exposing a part of lead, e.g. for soldering purposes
• CPC Class Codes: H05K 3/3426 : characterised by the leads
• CPC Class Codes: H05K 3/3442 : having edge contacts, e.g. leadless chip capacitors, chip carriers
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A semiconductor device comprises a semiconductor element and electrodes electrically connected to the semiconductor element, the semiconductor element and the electrodes being sealed by a sealing agent having an insulating property, the electrodes being exposed around a mounting surface that is joined via a joining agent to an external mounting circuit board, wherein the electrodes are shaped so that the joining agent is visually identifiable from side surfaces surrounding the mounting surface when the mounting surface is joined via the joining agent to the mounting circuit board.

Claims

1. A semiconductor device comprising a semiconductor element and electrodes electrically connected to the semiconductor element, the semiconductor element and the electrodes being sealed by a sealing agent having an insulating property, the electrodes being exposed around a mounting surface that is joined via a joining agent to an external mounting circuit board, wherein

the electrodes are shaped so that the joining agent is visually identifiable from side surfaces surrounding the mounting surface when the mounting surface is joined via the joining agent to the mounting circuit board.

2. The semiconductor device according to claim 1, wherein the electrodes assumes a shape cleared of edge portions close to the side surfaces on the mounting surface.

3. The semiconductor device according to claim 2, wherein the shape of the electrodes cleared of the edge portions is linearly inclined relative to the mounting surface.

4. The semiconductor device according to claim 2, wherein the shape of the electrodes cleared of the edge portions is curvedly inclined relative to the mounting surface.

5. The semiconductor device according to claim 1, wherein a plated layer is formed on the electrodes exposed on the mounting surface.

6. A method of manufacturing a semiconductor device, comprising:

a sealing step of sealing electrodes and a semiconductor element, that are electrically connected to each other, with a sealing agent having an insulating property in each of partitioned regions partitioned on a conductive foil, with the electrodes exposed around a mounting surface joined via a joining agent to a mounting circuit board;

a cutting step of removing an edge portion on each of the electrodes, close to a boundary portion of each of the partitioned regions toward the mounting surface, by moving a first blade over a given length vertically relative to the mounting surface for cutting; and

a separation step of separating each of the partitioned regions after removal of the edge portions.

7. The method of manufacturing a semiconductor device according to claim 6, wherein an edge of the first blade is V-shaped, and wherein the edge portion close to the boundary portion on each of the electrodes is cut into a linearly inclined shape relative to the mounting surface in the cutting step.

8. The method of manufacturing a semiconductor device according to claim 6, wherein the edge of the first blade is U-shaped, and wherein the edge portion close to the boundary portion on each of the electrodes is cut into a curvedly inclined shape relative to the mounting surface in the cutting step.

9. The method of manufacturing a semiconductor device according to claim 6, wherein the sealing step includes sealing in such a manner as to expose the electrodes on the boundary portions with the electrodes connected to each other in the adjacent partitioned regions, and wherein the cutting step includes cutting the electrodes exposed on the boundary portions by moving the first blade halfway in the direction of the thickness of the electrodes that are vertical relative to the mounting surface, the method further comprising, as an intermediate step between the cutting and separation steps, a plated layer formation step of forming a plated layer at one time on the electrodes that are exposed toward the mounting surface of the conductive foil.

10. The method of manufacturing a semiconductor device according to claim 6, wherein the separation step includes separating each of the partitioned regions by cutting the boundary portions with a second blade narrower in width than the first blade.