Thin-film semiconductor substrate, method of manufacturing thin-film semiconductor substrate, method of crystallization, apparatus for crystallization, thin-film semiconductor device, and method of manufacturing thin-film semiconductor device

• US 20050012228A1
• Filed: 06/30/2004
• Published: 01/20/2005
• Est. Priority Date: 07/16/2003
• Status: Active Grant

• Current Assignee: Advanced LCD Technologies Development Center Co., Ltd.
• Original Assignee: Advanced LCD Technologies Development Center Co., Ltd.
• Inventors: Kimura, Yoshinobu, Ogawa, Hiroyuki, Matsumura, Masakiyo, Hiramatsu, Masato, Jyumonji, Masayuki
• Granted Patent: US 7,105,419 B2
• Time in Patent Office: Days
• US Class Current: 257/797
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0268 Shape of mask
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 2223/5442 comprising non digital, non alphanumeric information, e.g. symbols
• CPC Class Codes: H01L 2223/54453 for use prior to dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 438/975 Substrate or mask aligning feature

Abstract

A thin-film semiconductor substrate includes an insulative substrate, an amorphous semiconductor thin film that is formed on the insulative substrate, and a plurality of alignment marks that are located on the semiconductor thin film and are indicative of reference positions for crystallization.

Claims

1. A thin-film semiconductor substrate comprising:

an insulative substrate;

an amorphous semiconductor thin film that is formed on the insulative substrate; and

a plurality of alignment marks that are located on said semiconductor thin film and are indicative of reference positions for crystallization.

2. The thin-film semiconductor substrate according to claim 1, wherein each of said alignment marks is a recess located in said semiconductor thin film.

3. The thin-film semiconductor substrate according to claim 2, wherein said recess is defined by a groove that is located in an insulation film formed as an underlayer of said semiconductor thin film.

4. The thin-film semiconductor substrate according to claim 3, wherein said groove is superposed on a groove that is formed in said insulative substrate.

5. The thin-film semiconductor substrate according to claim 1, wherein each of the alignment marks is an opening formed in said semiconductor thin film.

6. The thin-film semiconductor substrate according to claim 1, wherein each of the alignment marks is a crystallized portion that is formed in said semiconductor thin film and distinguishable from a non-crystallized portion in color.

7. The thin-film semiconductor substrate according to claim 1, wherein each of the alignment marks includes a plurality of straight lines that are perpendicular to each other.

8. A method of manufacturing a thin-film semiconductor substrate, comprising:

forming an amorphous semiconductor thin film on an insulative substrate; and

providing a plurality of alignment marks located on said semiconductor thin film, the alignment marks being indicative of reference positions for crystallization.

9. A crystallization method comprising:

forming a thin-film semiconductor substrate including an insulative substrate, an amorphous semiconductor thin film that is formed on said insulative substrate, and a plurality of alignment marks that are located on said semiconductor thin film and are indicative of reference positions for crystallization; and

applying a laser beam for crystallization to said semiconductor thin film through a phase shifter that is aligned with the reference positions for crystallization.

10. The crystallization method according to claim 9, wherein said alignment marks are formed as openings in said semiconductor thin film by applying a laser beam for trimming to said semiconductor thin film through marking patterns that are disposed on said phase shifter along with a phase shift pattern for passing the laser beam for crystallization.

11. The crystallization method according to claim 9, wherein said alignment marks are formed as crystallized portions in said semiconductor thin film by applying the laser beam for crystallization to said semiconductor thin film through marking patterns that are located on said phase shifter along with a phase shift pattern for passing the laser beam for crystallization.

12. A crystallization apparatus comprising:

a substrate stage for mounting of a thin-film semiconductor substrate including an insulative substrate, an amorphous semiconductor thin film that is formed on said insulative substrate, and a plurality of alignment marks that are located on said semiconductor thin film and are indicative of reference positions for crystallization; and

a laser irradiation section that applies a laser beam for crystallization to said semiconductor thin film through a phase shifter that is aligned with the reference positions for crystallization.

13. A crystallization apparatus comprising:

a substrate stage for mounting of a thin-film semiconductor substrate including an insulative substrate and an amorphous semiconductor thin film formed on said insulative substrate;

a laser processing unit that forms openings in said semiconductor thin film as alignment marks indicative of reference positions for crystallization by applying a laser beam for trimming to said semiconductor thin film through marking patterns provided on a phase shifter; and

a laser irradiation section that applies a laser beam for crystallization to said semiconductor thin film through a phase shift pattern provided along with the marking patterns on said phase shifter.

14. A crystallization apparatus comprising:

a substrate stage for mounting of a thin-film semiconductor substrate including an insulative substrate and an amorphous semiconductor thin film formed on said insulative substrate; and

a laser irradiation section that applies a laser beam for crystallization to said semiconductor thin film through marking patterns provided on a phase shifter to obtain crystallized portions serving as alignment marks indicative of reference positions for crystallization and through a phase shift pattern that is provided along with the marking patterns on said phase shifter.

15. A thin-film semiconductor device comprising:

an insulative substrate;

a polycrystalline semiconductor thin film formed on said insulative substrate; and

a semiconductor active device;

wherein said polycrystalline semiconductor thin film includes at least one single-crystal semiconductor grain along with a plurality of alignment marks having a predetermined positional relationship with said single-crystal semiconductor grain,

said single-crystal semiconductor grain has a predetermined grain size to accommodate said semiconductor active device, and

said semiconductor active device is located in a range of said single-crystal semiconductor grain with reference to said alignment marks.

16. A method of manufacturing a thin-film semiconductor device, comprising:

forming on an insulative substrate a polycrystalline semiconductor thin film that includes at least one single-crystal semiconductor grain along with a plurality of alignment marks having a predetermined positional relationship with the single-crystal semiconductor grain; and

forming a semiconductor active device;

wherein said single-crystal semiconductor grain has a predetermined grain size to accommodate said semiconductor active device, and said semiconductor active device is located in a range of said single-crystal semiconductor grain with reference to said alignment marks.