Flash memories with adaptive reference voltages

• US 20050013165A1
• Filed: 06/16/2004
• Published: 01/20/2005
• Est. Priority Date: 06/17/2003
• Status: Active Grant

• Current Assignee: Western Digital Israel Limited (Western Digital Corporation)
• Original Assignee: Amir Ban
• Inventors: Ban, Amir
• Granted Patent: US 7,372,731 B2
• Time in Patent Office: Days
• US Class Current: 365/185.200
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 2211/5634 Reference cells

Abstract

Cells of a flash memory are read by determining respective adaptive reference voltages for the cells and comparing the cells'"'"' threshold voltages to their respective reference voltages. The adaptive reference voltages are determined either from analog measurements of the threshold voltages of the cells'"'"' neighbors or from preliminary estimates of the cells'"'"' threshold voltages based on comparisons of the cells'"'"' threshold voltages with integral or fractional reference voltages common to all the cells. Cells of a flash memory also are read by comparing the cells'"'"' threshold voltages to integral reference voltages, comparing the threshold voltages of cells that share a common bit pattern to a fractional reference voltage, and adjusting the reference voltages in accordance with the comparisons.

Claims

1. A method of reading a plurality of cells of a flash memory, comprising the steps of:

(a) for each cell;

(i) determining at least one respective reference voltage for said each cell; and

(ii) comparing a threshold voltage of said each cell to said at least one respective reference voltage.

2. The method of claim 1, wherein, for each cell, said determining is based on a measurement of said threshold voltage of at least one neighbor of said each cell.

3. The method of claim 2, wherein said measurement is an analog measurement.

4. The method of claim 1, further comprising the step of

(b) prior to said determinings, for each cell, obtaining a preliminary estimate of said threshold voltage of said each cell by comparing said threshold voltage of said each cell to at least one nominal reference voltage that is common to all the cells, said determining then being based, for each cell, on said preliminary estimate of said threshold voltage of at least one neighbor of said each cell.

5. The method of claim 4, wherein said at least one nominal reference voltage is an integral reference voltage.

6. The method of claim 4, wherein said at least one nominal reference voltage is a fractional reference voltage.

7. A flash memory comprising:

(a) a plurality of cells; and

(b) for each cell;

a circuit for;

(i) reading a threshold voltage of at least one neighbor of said each cell, and

(ii) setting at least one respective reference voltage for said each cell based on said threshold voltage of said at least one neighbor of said each cell.

8. The flash memory of claim 7, wherein, for each cell, said circuit is an analog circuit.

9. A flash memory comprising:

(a) a plurality of cells; and

(b) a controller for;

(i) obtaining a preliminary estimate of a threshold voltage of each said cell by comparing said threshold voltage to at least one nominal reference voltage that is common to all the cells, and

(ii) based on said preliminary estimates, determining at least one respective reference voltage for each said cell.

10. A method of reading a plurality of flash memory cells, comprising the steps of:

(a) providing at least one integral reference voltage and at least one fractional reference voltage;

(b) comparing a threshold voltage of each cell of the plurality to said at least one integral reference voltage and to said at least one fractional reference voltage to determine at least one statistic of said threshold voltages for the plurality of flash memory cells; and

(c) adjusting at least one of said at least one integral reference voltage and said at least one fractional reference voltage in accordance with said at least one statistic.

11. The method of claim 10, wherein said at least one integral reference voltage defines a plurality of voltage bands, the method further comprising the step of:

(e) programming said threshold voltages of a sufficient number of said cells within each said voltage band to permit said at least one statistic to be determined.

12. A flash memory comprising:

(a) a plurality of cells; and

(b) a controller for reading said cells by;

(i) providing at bast one integral reference voltage and at least one fractional reference voltage,

(ii) comparing a threshold voltage of each said cell of said plurality to said at least one integral reference voltage and to said at least one fractional reference voltage to determine at least one statistic of said threshold voltages for the plurality of flash memory cells, and

(iii) adjusting at least one of said at least one integral reference voltage and said at least one fractional reference voltage in accordance with said at least one statistic.

13. The flash memory of claim 12, wherein said at least one integral reference voltage defines a plurality of voltage bands, and wherein said controller is further operative:

(i) to program said threshold voltages of said cells in accordance with data received from a host; and

(ii) if, subsequent to said programming, too few of said threshold values are within one of said voltage bands to permit said determining of said at least one statistic;

(A) to select a subplurality of said cells sufficient in number to permit said determining of said at least one statistic if said threshold values of said cells of said subplurality are within said one voltage band, and

(B) to program said threshold voltages of said cells of said subplurality to be within said one voltage band.