System and method for providing hardware-assisted task scheduling

• US 20050015768A1
• Filed: 12/30/2003
• Published: 01/20/2005
• Est. Priority Date: 12/31/2002
• Status: Abandoned Application

• Current Assignee: Mark Justin Moore
• Original Assignee: Mark Justin Moore
• Inventors: Moore, Mark Justin
• Application Number:
  US10/747,248
• Publication Number:
  US 20050015768A1
• Time in Patent Office: Days
• US Class Current: 718/102
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Abstract

A method, system and computer-readable medium for scheduling tasks, wherein a task switch request is initially received. A scheduling processor prioritizes the available tasks and inserts a highest priority task state into a first address register associated with a CPU. Next, the CPU suspends operation of the currently executing task and inserts a state of the suspended task into a second address register associated with the CPU. The CPU loads the task state from the first address register associated with the CPU and resumes the loaded task loaded. The scheduling processor then retrieves the task state from the second address register by the scheduling processor and schedules the retrieved task for subsequent execution.

Claims

1. A method for scheduling tasks, comprising:

receiving a task switch request;

prioritizing, by a scheduling processor, available tasks;

inserting a highest priority task state into a first address register associated with a CPU;

suspending operation of the currently executing task;

inserting a state of the suspended task into a second address register associated with the CPU;

loading the state from the first address register associated with the CPU;

resuming the task loaded from the first address register;

retrieving the task state from the second address register by the scheduling processor;

scheduling the retrieved task for subsequent execution.

2. The method of claim 1, wherein the CPU is an ARM-based CPU.

3. The method of claim 1, wherein the CPU is a MIPS-based CPU.

4. The method of claim 1, further comprising receiving a pre-emptive task switch request from the scheduling processor.

5. The method of claim 1, further comprising:

executing a message-transfer based operating system, wherein the message-transfer based operating system utilizes message queues to initiate and suspend task execution.

6. The method of claim 5, further comprising:

providing a queue manager operatively connected to the CPU and the scheduling processor, wherein the queue manager performs queue maintenance duties for the CPU and scheduling processor; and

receiving a task suspend request from a queue manager in reponse to at least one message transfer.

7. The method of claim 6, wherein the queue manager performs QueuePut, QueueGet, QueueWait, and QueueSteal operations.

8. A system for scheduling tasks, comprising:

a CPU for executing tasks; and

a scheduling processor for prioritizing available tasks, the scheduling processor operatively connected to the CP,

wherein the CPU receives a task switch request,

wherein the scheduling processor inserts a highest priority task state into a first address register associated with a CP,

wherein the CPU suspends operation of the currently executing task,

wherein the CPU inserts a state of the suspended task into a second address register associated with the CPU,

wherein the CPU loads the state from the first address register associated with the CPU,

wherein the CPU resumes the task loaded from the first address register,

wherein the scheduling processor retrieves the task state from the second address register, and

wherein the scheduling processor schedules the retrieved task for subsequent execution.

9. The system of claim 8, wherein the CPU is an ARM-based CPU.

10. The system of claim 8, wherein the CPU is a MIPS-based CPU.

11. The system of claim 8, wherein the CPU receives a pre-emptive task switch request from the scheduling processor.

12. The system of claim 8, wherein the CPU executes a message-transfer based operating system, wherein the message-transfer based operating system utilizes message queues to initiate and suspend task execution.

13. The system of claim 12, further comprising:

a queue manager operatively connected to the CPU and the scheduling processor, wherein the queue manager performs queue maintenance duties for the CPU and scheduling processor; and

wherein the CPU receives a task suspend request from a queue manager in response to at least one message transfer.

14. The system of claim 13, wherein the queue manager performs QueuePut, QueueGet, QueueWait, and QueueSteal operations.

15. A computer-readable medium incorporating tasks for scheduling tasks, comprising:

one or more instructions for receiving a task switch request;

one or more instructions for prioritizing, by a scheduling processor, available tasks;

one or more instructions for inserting a highest priority task state into a first address register associated with a CPU;

one or more instructions for suspending operation of the currently executing task;

one or more instructions for inserting a state of the suspended task into a second address register associated with the CPU;

one or more instructions for loading the state from the first address register associated with the CPU;

one or more instructions for resuming the task loaded from the first address register;

one or more instructions for retrieving the task state from the second address register by the scheduling processor;

one or more instructions for scheduling the retrieved task for subsequent execution.

16. The computer-readable medium of claim 15, wherein the CPU is an ARM-based CPU.

17. The computer-readable medium of claim 15, wherein the CPU is a MIPS-based CPU.

18. The computer-readable medium of claim 15, further comprising one or more instructions for receiving a pre-emptive task switch request from the scheduling processor.

19. The computer-readable medium of claim 15, further comprising:

one or more instructions for executing a message-transfer based operating system, wherein the message-transfer based operating system utilizes message queues to initiate and suspend task execution.

20. The computer-readable medium of claim 19, further comprising:

one or more instructions for providing a queue manager operatively connected to the CPU and the scheduling processor, wherein the queue manager performs queue maintenance duties for the CPU and scheduling processor; and

one or more instructions for receiving a task suspend request from a queue manager in reponse to at least one message transfer.

21. The computer-readable medium of claim 20, wherein the queue manager performs QueuePut, QueueGet, QueueWait, and QueueSteal operations.