Method and system for selecting virtual lanes in fibre channel switches

• US 20050018621A1
• Filed: 07/20/2004
• Published: 01/27/2005
• Est. Priority Date: 07/21/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: QLogic Corporation (Marvell Technology Group Limited)
• Inventors: Dropps, Frank R., Ross, Edward C., Gustafson, William J.
• Granted Patent: US 7,525,983 B2
• Time in Patent Office: Days
• US Class Current: 370/254
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/357 Fibre channel switches

Abstract

A method for assigning virtual lanes (VL) in a fibre channel switch is provided. The fibre channel switch element includes a virtual lane cache that can compare incoming frame parameters based on which virtual lanes may be assigned; and a register to store parameters used for virtual lane assignment. The method includes, determining if VL assignment is to be based on an incoming frame parameter or a programmed value; determining if an incoming frame is a preferred frame; and assigning a preferred routing priority if the incoming frame is designated as a preferred frame. The method also includes, determining if a fabric topology is known; and assigning virtual lanes based on a known fabric topology.

Claims

1. A method for assigning virtual lanes (VL) in a fibre channel switch, comprising:

determining if VL assignment is to be based on an incoming frame parameter or a programmed value;

determining if an incoming frame is a preferred frame; and

assigning a preferred routing priority if the incoming frame is designated as a preferred frame.

20. The method of claim 1, wherein VL assignment criteria may vary from port to port of the fibre channel switch element.

22. The method of claim 1, wherein different links of the fibre channel switch element may have different VL assignment criteria.

24. The method of claim 22, wherein each end of a link may have different VL assignment criteria.

26. The method of claim 1, wherein VL assignment may be performed for N_Ports and/or loop ports.

2. A method for assigning virtual lanes, based on fabric topology, comprising:

determining if a fabric topology is known; and

assigning virtual lanes based on a known fabric topology.

3. The method of claim 2, further comprising:

identifying fabric topology if the fabric topology in claim 2 is not known; and

assigning virtual lanes based on the identified fabric topology.

4. A system used for assigning virtual lanes in a fibre channel switch, comprising:

a virtual lane cache that can compare incoming frame parameters based on which virtual lanes may be assigned; and

a register to store parameters used for virtual lane assignment.

5. The system of claim 4, wherein the virtual lane cache includes a control word register and a port pair register and their values are used for virtual lane assignment.

6. The system of claim 5, wherein the virtual lane cache includes logic for comparing incoming frame parameters with values stored in the port pair word register.

7. A method for selecting virtual lanes in a fibre channel switch, comprising:

determining if a virtual lane is to be assigned based on a control register value or a virtual lane cache value; and

determining if a frame is to be given routing priority over other frames.

8. The method of claim 7, where a frame'"'"'s S_ID, D_ID, OX_ID or VSAN_ID may be used to assign virtual lanes.

21. The method of claim 7, wherein VL assignment criteria may vary from port to port of the fibre channel switch element.

23. The method of claim 7, wherein different links of the fibre channel switch element may have different VL assignment criteria.

25. The method of claim 23, wherein each end of a link may have different VL assignment criteria.

27. The method of claim 7, wherein VL assignment may be performed for N_Ports and/or loop ports.

9. A method for adjusting virtual lane credit for fibre channel switches, comprising;

determining if virtual lanes are enabled with virtual lane compression; and

mapping VC_RDYs, if virtual lane compression is enabled.

10. A system for collecting virtual lane statistics in a fibre channel switch element, comprising:

plural counters for collecting information regarding a virtual lane, including a credit counter for monitoring virtual lane credit.

11. The system of claim 10, further comprising:

a counter for counting each time a frame is tossed for any hard zoning violations.

12. The system of claim 10, further comprising:

a counter for counting a number of attempts a frame makes to violate a hard zone.

13. The system of claim 10, further comprising:

a counter for counting a duration for which a frame is waiting for VL credit for transmission.

14. The system of claim 10, further comprising:

a counter for counting incoming frame and words for different frame classes.

15. The system of claim 10, further comprising:

a counter for counting an invalid transmission word at a receive segment of the fibre channel switch element.

16. The system of claim 10, further comprising:

a counter for counting CRC errors on incoming frames.

17. The system of claim 10, further comprising:

a counter for counting the number of attempts a transmit segment makes to transmit a frame but is unable to transmit the frame due to lack of virtual lane credit.

18. The system of claim 10, further comprising:

a counter for counting each time a class 3 frame is tossed from a transmit segment for violations other than hard zoning.

19. The system of claim 10, further comprising:

a counter for counting each time a class 2 and/or class 3 frame leaves a fabric.