Programmable pseudo virtual lanes for fibre channel systems

• US 20050018676A1
• Filed: 07/20/2004
• Published: 01/27/2005
• Est. Priority Date: 07/21/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: QLogic Corporation (Marvell Technology Group Limited)
• Inventors: Dropps, Frank R., Ross, Edward C.
• Granted Patent: US 7,406,092 B2
• Time in Patent Office: Days
• US Class Current: 370/389
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04L 49/506 Backpressure

Abstract

A method and switch element for assigning priority to pseudo virtual lanes (“PVL”) using a fibre channel switch element is provided. The method includes, assigning received R_RDYs based on a PVL distribution scheme; and determining traffic congestion on a PVL if there is no credit available to transfer frames from the PVL. A minimum bandwidth feature is enabled to avoid lower priority PVLs from getting no credit for transmitting frames; and distributing credit and R_RDYs based on frame age bits, wherein a lower priority PVL gets credit if a frame is waiting in the PVL for a longer duration compared to a higher priority PVL. The switch element includes, a PVL module having credit counters for plural PVLs; and a timer that monitors frame traffic for each PVL lane. If a PVL gets congested, then a state machine adjusts priority of R_RDY distribution scheme of other PVLs to transmit frames.

Claims

1. A method for assigning priority to pseudo virtual lanes (“

PVL”

) using a fibre channel switch element, comprising;

assigning received R_RDYs based on a PVL distribution scheme; and

determining traffic congestion on a PVL if there is no credit available to transfer frames from the PVL.

2. The method of claim 1, further comprising:

adjusting a PVL counter value.

3. The method of claim 1, wherein traffic congestion is determined by monitoring a threshold wait count value for the PVL.

4. The method of claim 3, wherein the threshold wait count value is programmed by fibre channel switch element firmware.

5. The method of claim 3, wherein a state machine monitors the threshold wait count value to determine congestion.

6. The method of claim 3, if traffic congestion is detected then priority for plural PVLs is adjusted.

7. The method of claim 6, wherein the state machine adjusts R_RDY priority distribution scheme.

8. A method for routing fibre channel frames using a fibre channel switch element, comprising:

enabling a minimum bandwidth feature to avoid lower priority pseudo virtual lanes from getting no credit for transmitting frames; and

distributing credit and R_RDYs based on frame age bits, wherein a lower priority pseudo virtual lane (“

PVL”

) gets credit if a frame is waiting in the PVL for a longer duration compared to a higher priority PVL.

9. The method of claim 8, wherein a threshold wait counter is used to determine how long a frame has been waiting for transmission for a particular PVL.

10. A fibre channel switch element having a receive segment and a transmit segment for routing fibre channel frames, comprising:

a pseudo virtual lane (“

PVL”

) module having credit counters for plural PVLs, wherein each PVL is assigned a threshold credit value and a maximum credit value; and

a timer that monitors frame traffic for each PVL and if a PVL stops transmitting frames, a status bit is sent to a state machine that adjusts PVL priority based on the status bit.

11. The switch element of claim 10, wherein if a higher priority lane gets congested, then the state machine adjusts priority of R_RDY distribution scheme of other PVLs to transmit frames.

12. The switch element of claim 11, wherein if traffic congestion is not relieved after the priority is adjusted, then minimum bandwidth logic allocates credit to a lower priority PVL to provide a minimum bandwidth.