Method for fabricating a semiconductor device

• US 20050020057A1
• Filed: 08/25/2004
• Published: 01/27/2005
• Est. Priority Date: 02/28/2002
• Status: Active Grant

• Current Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited, Tokyo Electron Limited
• Inventors: Inazawa, Koichiro, Kudo, Hiroshi
• Granted Patent: US 7,163,887 B2
• Time in Patent Office: Days
• US Class Current: 438/638
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76811 involving multiple stacked pre-patterned masks

Abstract

A method for fabricating a semiconductor device that prevents the occurrence of bowing and thickness reduction in a dual damascene method. As shown in FIG. 2(B), silicon nitride etching is performed on a semiconductor device in process of fabrication which has a section shown in FIG. 2(A). As a result, part of a copper film is oxidized and changes into oxide. Moreover, a CF_x deposit is formed on it. By performing organic insulating film etching by the use of hydrogen plasma in FIG. 2(C), however, the oxide is deoxidized to copper and the CF_x deposit is converted into a volatile compound and is removed.

Claims

1. A method for fabricating a semiconductor device, the method comprising:

a process for forming a cap film, a first insulating film, an organic insulating film, a second insulating film and a mask film in order on a semiconductor substrate;

a process for making a first opening of a wiring shaped pattern by etching part of the mask film;

a process for making a second opening of a hole shaped pattern by etching part of the second insulating film which overlaps with the first opening;

a process for making a third opening of the hole shaped pattern in the organic insulating film by etching the organic insulating film through the second opening in the second insulating film;

a process for making a fourth opening of the wiring shaped pattern in the second insulating film by etching the second insulating film through the first opening in the mask film, and for making a fifth opening of the hole shaped pattern in the first insulating film by etching the first insulating film through the third opening in the organic insulating film;

a process for making a sixth opening of the hole shaped pattern in the cap film by etching the cap film through the fifth opening in the first insulating film to use the sixth opening and the fifth opening as a via hole, and for removing the mask film;

a process for making a seventh opening of the wiring shaped pattern in the organic insulating film by etching the organic insulating film through the fourth opening in the second insulating film to use the seventh opening and the fourth opening as a wiring trench; and

a process for forming a via in the via hole and a wiring in the wiring trench by embedding a conductor in the via hole and the wiring trench at the same time.

2. The method for fabricating a semiconductor device according to claim 1, wherein the seventh opening is formed by plasma etching with hydrogen (H₂) gas, ammonia (NH₃) gas, or a mixed gas which contains hydrogen gas and ammonia gas.

3. The method for fabricating a semiconductor device according to claim 1, wherein the relation

W1≧

W2

holds, where W2 is the maximum distance between side walls of the seventh opening made in the organic insulating film and W1 is the maximum distance between side walls of the fourth opening made in the second insulating film.

4. The method for fabricating a semiconductor device according to claim 3, wherein the relation

(W2−

W1)/2≦

10 nm

holds between the W1 and the W2.

5. The method for fabricating a semiconductor device according to claim 1, wherein the mask film and the cap film are formed by the use of silicon nitride or silicon carbide.

6. The method for fabricating a semiconductor device according to claim 1, wherein the organic insulating film is formed by the use of a polymer which contains hydrocarbon or arylether, organic SOG, inorganic SOG, or silicon oxycarbide (SiOC).

7. A method for fabricating a semiconductor device, the method comprising:

a process for forming a cap film, an organic insulating film, an insulating film and a mask film in order on a semiconductor substrate;

a process for making a first opening of a wiring shaped pattern by etching part of the mask film;

a process for making a second opening of a hole shaped pattern by etching part of the insulating film which overlaps with the first opening;

a process for making a third opening of the hole shaped pattern in the organic insulating film by etching the organic insulating film through the second opening in the insulating film;

a process for making a fourth opening of the wiring shaped pattern in the insulating film by etching the insulating film through the first opening in the mask film;

a process for making a fifth opening of the hole shaped pattern in the cap film by etching the cap film through the third opening in the organic insulating film to use the fifth opening and the third opening as a via hole, and for removing the mask film;

a process for making a sixth opening of the wiring shaped pattern in the organic insulating film by etching the organic insulating film through the fourth opening in the insulating film to use the sixth opening and the fourth opening as a wiring trench; and

a process for forming a via in the via hole and a wiring in the wiring trench by embedding a conductor in the via hole and the wiring trench at the same time.

8. The method for fabricating a semiconductor device according to claim 7, wherein the sixth opening is formed by plasma etching with hydrogen (H₂) gas or ammonia (NH₃) gas.

9. The method for fabricating a semiconductor device according to claim 7, wherein the relation

W1≧

W2

holds, where W2 is the maximum distance between side walls of the sixth opening made in the organic insulating film and W1 is the maximum distance between side walls of the fourth opening made in the insulating film.

10. The method for fabricating a semiconductor device according to claim 8, wherein the relation

(W2−

W1)/2≦

10 nm

holds between the W1 and the W2.

11. The method for fabricating a semiconductor device according to claim 7, wherein the mask film and the cap film are formed by the use of silicon nitride or silicon carbide.

12. The method for fabricating a semiconductor device according to claim 7, wherein the organic insulating film is formed by the use of a polymer which contains hydrocarbon or arylether, organic SOG, inorganic SOG, or silicon oxycarbide (SiOC).

13. A method for fabricating a semiconductor device, the method comprising:

a process for forming a cap film, a first organic insulating film, a first insulating film, a second organic insulating film, a second insulating film and a mask film in order on a semiconductor substrate;

a process for making a first opening of a wiring shaped pattern by etching part of the mask film;

a process for making a second opening of a hole shaped pattern by etching part of the second insulating film which overlaps with the first opening;

a process for making a third opening of the hole shaped pattern in the second organic insulating film by etching the second organic insulating film through the second opening in the second insulating film;

a process for making a fourth opening of the hole shaped pattern in the first insulating film by etching the first insulating film through the third opening in the second organic insulating film;

a process for making a fifth opening of the hole shaped pattern in the first organic insulating film by etching the first organic insulating film through the fourth opening in the first insulating film;

a process for making a sixth opening of the wiring shaped pattern in the second insulating film by etching the second insulating film through the first opening in the mask film;

a process for making a seventh opening of the hole shaped pattern in the cap film by etching the cap film through the fifth opening in the first organic insulating film to use the seventh opening, the fourth opening, and the fifth opening as a via hole, and for removing the mask film;

a process for making an eighth opening of the wiring shaped pattern in the second organic insulating film by etching the second organic insulating film through the sixth opening in the second insulating film to use the eighth opening and the sixth opening as a wiring trench; and

a process for forming a via in the via hole and a wiring in the wiring trench by embedding a conductor in the via hole and the wiring trench at the same time.

14. The method for fabricating a semiconductor device according to claim 13, wherein the eighth opening is formed by plasma etching with hydrogen (H₂) gas or ammonia (NH₃) gas.

15. The method for fabricating a semiconductor device according to claim 13, wherein the relation

W1≧

W2

holds, where W2 is the maximum distance between side walls of the eighth opening made in the second organic insulating film and W1 is the maximum distance between side walls of the sixth opening made in the second insulating film.

16. The method for fabricating a semiconductor device according to claim 15, wherein the relation

(W2−

W1)/2≦

10 nm

holds between the W1 and the W2.

17. The method for fabricating a semiconductor device according to claim 13, wherein the mask film and the cap film are formed by the use of silicon nitride or silicon carbide.

18. The method for fabricating a semiconductor device according to claim 13, wherein the first organic insulating film and the second organic insulating film are formed by the use of a polymer which contains hydrocarbon or arylether, organic SOG, inorganic SOG, or silicon oxycarbide (SiOC).

19. A method for fabricating a semiconductor device including a process for forming a dual damascene structure by selectively removing an organic insulating film which covers a laminated structure made up of a copper layer and a silicon nitride film by the use of hydrogen plasma and by forming a window in the bottom of which the copper layer gets exposed.