Method for an integrated circuit contact
First Claim
1. A control method for an etching process, comprising:
- using a first resist mask to pattern an etch stop during said etching process;
using said first resist mask to pattern an insulation layer during said etching process; and
using said etch stop and a second resist mask to further pattern said insulation layer during said etching process.
1 Assignment
0 Petitions
Accused Products
Abstract
A process for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect trough. The process including forming an insulating layer on the surface of a substrate; forming an etch stop layer on the surface of the insulating layer; forming an opening in the etch stop layer; etching to a first depth through the opening in the etch stop layer and into the insulating layer to form an interconnect trough; forming a photoresist mask on the surface of the etch stop layer and in the trough; and continuing to etch through the insulating layer until reaching the surface of the substrate to form a contact hole. The process may be repeated during the formation of multilevel metal integrated circuits.
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Citations
20 Claims
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1. A control method for an etching process, comprising:
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using a first resist mask to pattern an etch stop during said etching process;
using said first resist mask to pattern an insulation layer during said etching process; and
using said etch stop and a second resist mask to further pattern said insulation layer during said etching process. - View Dependent Claims (2, 3)
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4. A processing method for a semiconductor circuit portion including an insulator, comprising:
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providing an etch stop as part of said semiconductor circuit portion, said etch stop overlying said insulator;
patterning said etch stop using a first resist mask;
patterning said insulator using said first resist mask; and
patterning said insulator with said etch stop and a second resist mask. - View Dependent Claims (5)
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6. A method for controlling an etching process, comprising:
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using a first resist mask to pattern an etch stop during said etching process;
using said first resist mask to pattern an insulation layer during said etching process; and
using said etch stop and a second resist mask to further pattern said insulation layer during said etching process. - View Dependent Claims (7, 8)
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9. A method for processing a portion of a semiconductor circuit having an insulator, comprising:
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providing an etch stop as part of said semiconductor circuit portion, said etch stop overlying said insulator;
patterning said etch stop using a first resist mask;
patterning said insulator using said first resist mask; and
patterning said insulator with said etch stop and a second resist mask. - View Dependent Claims (10)
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11. A method for performing an etching process, comprising:
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using a first resist mask to pattern an etch stop during said etching process;
using said first resist mask to pattern an insulation layer during said etching process; and
using said etch stop and a second resist mask to further pattern said insulation layer during said etching process. - View Dependent Claims (12, 13)
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14. A method in a process for controlling the etching of a portion of a semiconductor circuit having an insulator, comprising:
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providing an etch stop as part of said semiconductor circuit portion, said etch stop overlying said insulator;
patterning said etch stop using a first resist mask;
patterning said insulator using said first resist mask; and
patterning said insulator with said etch stop and a second resist mask. - View Dependent Claims (15)
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16. A method for limiting an etching process, comprising:
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using a first resist mask to pattern an etch stop during said etching process;
using said first resist mask to pattern an insulation layer during said etching process; and
using said etch stop and a second resist mask to further pattern said insulation layer during said etching process. - View Dependent Claims (17, 18)
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19. A method for processing a portion of a semiconductor circuit having an insulator for controling the etching thereof, comprising:
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providing an etch stop as part of said semiconductor circuit portion, said etch stop overlying said insulator;
patterning said etch stop using a first resist mask;
patterning said insulator using said first resist mask; and
patterning said insulator with said etch stop and a second resist mask. - View Dependent Claims (20)
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Specification