Data processing circuit, display device, and mobile terminal

• US 20050024313A1
• Filed: 05/28/2003
• Published: 02/03/2005
• Est. Priority Date: 05/31/2002
• Status: Active Grant

• Current Assignee: Japan Display West Incorporated (Japan Display Incorporated)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Nakajima, Yoshiharu, Ichikawa, Hiroaki, Kida, Yoshitoshi
• Granted Patent: US 6,958,716 B2
• Time in Patent Office: Days
• US Class Current: 345/95
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0281 Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/0294 Details of sampling or holding circuits arranged for use in a driver for data electrodes
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

When a data processing circuit is formed on an insulating substrate by using TFTs, it is difficult to process a data signal having a high data rate, such as digital display data, at a high speed.

In a data processing circuit formed on an insulating substrate by using TFTs, a data signal having a small voltage amplitude input in series is increased in level to a data signal having a large voltage amplitude by a level shift circuit (11), the serial data signal having the large voltage amplitude is converted to parallel data signals by a serial-parallel conversion circuit (12), and then, the parallel data signals are reduced in level to data signals having a small voltage amplitude by level shift circuits (13A and 13B). Therefore, high-speed processing can be applied to digital data signals at a low power consumption.

Claims

1. A data processing circuit characterized by comprising:

first level-conversion means for level-converting a data signal having a first voltage amplitude input in series to a data signal having a second voltage amplitude larger than the first voltage amplitude;

serial-parallel conversion means for converting the data signal level-converted by the first level-conversion means to parallel data signals; and

second level-conversion means for level-converting the parallel data signals to data signals having a third voltage amplitude smaller than the second voltage amplitude, and

characterized in that the data processing circuit is formed on an insulating substrate by using thin-film transistors.

2. A data processing circuit according to claim 1, characterized in that

the first level-conversion means and the serial-parallel conversion means comprise a plurality of sample-and-latch level conversion circuits to which the data signal having the first voltage amplitude is input in common, and sampling is performed in the plurality of sample-and-latch level conversion circuits by a plurality of sampling signals having different timing.

3. A display apparatus characterized by comprising:

a display section formed of pixels disposed in a matrix manner on a transparent, insulating substrate;

a plurality of horizontal driving circuits mounted on the transparent, insulating substrate together with the display section, for writing display data into the pixels in the display section; and

a data processing circuit mounted on the transparent, insulating substrate together with the display section, for processing a display data signal having a first voltage amplitude input in series from the outside of the substrate and for sending to the plurality of horizontal driving circuits, and

characterized in that

the data processing circuit is formed of thin-film transistors, and

the data processing circuit comprises

first level-conversion means for level-converting the display data signal having the first voltage amplitude to a display data signal having a second voltage amplitude larger than the first voltage amplitude;

serial-parallel conversion means for converting the display data signal level-converted by the first level-conversion means to parallel display data signals; and

second level-conversion means for level-converting the parallel display data signals to display data signals having a third voltage amplitude smaller than the second voltage amplitude and for sending the display data signals to the plurality of horizontal driving circuits.

4. A display apparatus according to claim 3, characterized in that

the plurality of horizontal driving circuits is operated at the third voltage of a power supply, and comprises a data latch circuit group for latching the display data signals sent from the data processing circuit.

5. A display apparatus according to claim 4, characterized in that

the plurality of horizontal driving circuits is operated at the third voltage of a power supply, and comprises a second latch circuit group for latching display data signals collectively sent from the data latch circuit group, and a level shift circuit group for level-converting the display data signals latched by the second latch circuit group to display data signals having a fourth voltage amplitude larger than the third voltage amplitude.

6. A display apparatus according to claim 5, characterized in that

the fourth voltage amplitude is set to a voltage amplitude required for processing in a DA conversion circuit group for converting the display data signals output from the level shift circuit group, to analog display signals.

7. A portable terminal characterized by having mounted thereon a display apparatus as a screen display section, the display apparatus comprising:

a display section formed of pixels disposed in a matrix manner on a transparent, insulating substrate;

a plurality of horizontal driving circuits mounted on the transparent, insulating substrate together with the display section, for writing display data into the pixels in the display section; and

a data processing circuit mounted on the transparent, insulating substrate together with the display section, for processing a display data signal having a first voltage amplitude input in series from the outside of the substrate and for sending to the plurality of horizontal driving circuits,

wherein

the data processing circuit is formed of thin-film transistors, and

the data processing circuit comprises

first level-conversion means for level-converting the display data signal having the first voltage amplitude to a display data signal having a second voltage amplitude larger than the first voltage amplitude;

serial-parallel conversion means for converting the display data signal level-converted by the first level-conversion means to parallel display data signals; and

second level-conversion means for level-converting the parallel display data signals to display data signals having a third voltage amplitude smaller than the second voltage amplitude and for sending the display data signals to the plurality of horizontal driving circuits.