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Apparatus for reducing data corruption in a non-volatile memory

  • US 20050024968A1
  • Filed: 07/31/2003
  • Published: 02/03/2005
  • Est. Priority Date: 07/31/2003
  • Status: Active Grant
First Claim
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1. A circuit for delaying power interruption to a non-volatile memory device comprising:

  • a power supply having an output connected to the non-volatile memory device;

    a charge-storing device connected to the output of the power supply; and

    , a DC-to-DC converter connected at its input to the charge-storing device and the power supply and connected at its output to the non-volatile memory device such that upon interruption of the power supply, the charge-storing device provides sufficient input voltage to the DC-to-DC converter to provide rated output to the non-volatile memory device for a time sufficient for the non-volatile memory device to complete a write cycle.

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