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Packet reassembly and deadlock avoidance for use in a packet switch

  • US 20050025141A1
  • Filed: 06/18/2004
  • Published: 02/03/2005
  • Est. Priority Date: 06/19/2003
  • Status: Active Grant
First Claim
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1. For use in a system having a source module with a plurality of source queues, each of the source queues for storing one or more cells of one or more packets, a destination module with a plurality of destination queues, each of the destination queues for storing one or more cells of one or more packets, and a link between the source module and the destination module, a method for scheduling the communication of cells over the link comprising:

  • a) determining, in a substantially fair manner, a non-empty source queue to grant access to the link at a given time;

    b) determining whether or not to transmit a head-of-line cell of the determined non-empty source queue such that the transmission of cells of packets destined for different destination queues can be interleaved, but the transmission of cells of different packets destined for the same destination queue cannot be interleaved;

    c) if it is determined to transmit the head-of-line cell of the determined non-empty source queue, then transmitting the-head-of line cell; and

    d) if it is determined not to transmit the head-of-line cell of the determined non-empty source queue, then determining a next, non-empty source queue to grant access to the link in a substantially fair manner.

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