Method and apparatus for test pattern generation

• US 20050025193A1
• Filed: 07/12/2004
• Published: 02/03/2005
• Est. Priority Date: 07/16/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: QLogic Corporation (Marvell Technology Group Limited)
• Inventors: Fike, John M.
• Granted Patent: US 7,471,635 B2
• Time in Patent Office: Days
• US Class Current: 370/503
• CPC Class Codes: H04L 1/244 test sequence generators
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04L 49/555 Error detection

Abstract

A fiber channel switch element that can generate a character or frame based test pattern is provided. The switch element includes a buffer that can be coupled to a transmission protocol engine for sending and receiving data to and from a fiber channel network, wherein the buffer is programmed to generate character or fiber channel frames for testing plural links coupled to the fiber channel switch element while operating in a character or frame mode. The buffer can be coupled to a receive or transmit path and generates characters or frames based on a programmed count to induce real-time errors. The real-time errors include a missing start of frame (“SOF”) and a missing end of frame (“EOF”).

Claims

1. A fibre channel switch element that can generate a character or frame based test pattern, comprising:

a buffer that can be coupled to a transmission protocol engine for sending and receiving data to and from a fibre channel network, wherein the buffer is programmed to generate character or fibre channel frames for testing plural links coupled to the fibre channel switch element while operating in a character or frame mode.

2. The fibre channel switch element of claim 1, wherein the buffer can be coupled to a receive or transmit path.

3. The fibre channel switch element of claim 1, wherein the buffer generates characters or frames based on a programmed count.

4. The fibre channel switch element of claim 1, wherein the buffer generates characters or frames under firmware control.

5. The fibre channel switch element of claim 1, wherein the buffer can be programmed to induce real-time errors.

6. The fibre channel switch element of claim 5, wherein the real-time errors include a missing start of frame (“

SOF”

).

7. The fibre channel switch element of claim 5, wherein the real-time errors include a missing end of frame (“

EOF”

).

8. The fibre channel switch element of claim 6, wherein to induce a missing SOF, the buffer is started in a character mode and while it is running in the character mode, it is changed to a frame mode.

9. The fibre channel switch element of claim 7, wherein to induce a missing EOF, the buffer starts in a frame mode and then while it is running in the frame mode it changes to a character mode.

10. A method for generating test patterns in a fibre channel switch element, using a buffer that can be coupled to plural ports, comprising:

programming the buffer to operate in a character or frame mode;

connecting plural ports to receive data from the buffer after the buffer is programmed to operate in the character or frame mode;

generating a character stream if programmed to operate in the character mode; and

generating a frame if programmed to operate in a frame mode.

11. The method of claim 10, wherein the buffer can induce a start of frame error by starting in a frame mode and then while it is running in the frame mode changing to a character mode.

12. The method of claim 10, wherein the buffer can induce an end of frame error by starting in a character mode and then while it is running in the character mode changing to a frame mode.