Packaging of electronic chips with air-bridge structures

• US 20050026351A1
• Filed: 09/01/2004
• Published: 02/03/2005
• Est. Priority Date: 08/25/1999
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farrar, Paul A.
• Granted Patent: US 7,335,965 B2
• Time in Patent Office: Days
• US Class Current: 438/222
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 23/20 gaseous at the normal operating temperature of the device
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/4821 Bridge structure with air gap
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/1433 Application-specific integrated circuit [ASIC]
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A circuit assembly comprises an electronic chip and a conductive structure embedded in a plurality of materials having a plurality of vaporization temperatures. The plurality of materials is formed on the electronic chip and the conductive structure is coupled to the electronic chip. To fabricate the circuit assembly, a support structure, including interstices, is formed on an electronic chip. The interstices of the support structure are filled with a material having a vaporization temperature that is less than the vaporization temperature of the support structure. Conductive structures are embedded in the support structure and the material, and a connective structure is mounted on the support structure. Finally, the material is removed from the interstices by heating the circuit assembly.

Claims

1. An integrated circuit assembly comprising:

an electronic chip; and

a conductive structure including copper embedded in a plurality of materials, each of the plurality of materials having a different vaporization temperature, the plurality of materials is formed on the electronic chip and the conductive structure is coupled to the electronic chip.

2. The integrated circuit assembly of claim 1, wherein the electronic chip is an analog signal processing chip.

3. The integrated circuit assembly of claim 1, wherein at least one of the plurality of material is silicon dioxide.

4. The integrated circuit assembly of claim 1, wherein at least one of the plurality of materials is carbon.

5. An integrated circuit assembly comprising:

an electronic chip; and

a conductive structure including copper embedded in a material layer having a structural component having a structural vaporization temperature and a non-structural component having a non-structural vaporization temperature less than the structural vaporization temperature, the material layer is formed on the electronic chip and the conductive structure is coupled to the electronic chip.

6. The integrated circuit assembly of claim 5, wherein the electronic chip is a digital signal processor.

7. The integrated circuit assembly of claim 5, wherein the structural component is fabricated from silicon dioxide.

8. The integrated circuit assembly of claim 7, wherein the silicon dioxide is a low temperature silicon dioxide.

9. The integrated circuit assembly of claim 5, wherein the non-structural component is fabricated from carbon.

10. The integrated circuit assembly of claim 5, wherein the non-structural component is fabricated from a polymer.

11. The integrated circuit assembly of claim 10, wherein the polymer is a photoresist.

12. The integrated circuit assembly of claim 5, wherein the electronic chip is comprised of logic circuits.

13. An integrated circuit assembly comprising:

an electronic chip;

a support structure mounted on the electronic chip, the support structure having an interstice and a vaporization temperature;

a material filling the interstice, the material having a vaporization temperature that is less than the vaporization temperature of the support structure;

a connective structure mounted on the support structure; and

a conductive structure capable of coupling the electronic chip to the connective structure, the conductive structure embedded in the support structure and the material.

14. The integrated circuit assembly of claim 13, wherein the electronic chip is a dynamic random access memory chip.

15. The integrated circuit assembly of claim 13, wherein the support structure is fabricated from silicon dioxide.

16. The integrated circuit assembly of claim 13, wherein the support structure is a ribbed structure.

17. The integrated circuit assembly of claim 13, wherein the material is carbon dioxide.

18. The integrated circuit assembly of claim 13, wherein the connective structure is a controlled collapse chip connection (C4) structure.

19. The integrated circuit assembly of claim 13, wherein the conductive structure is fabricated from a copper alloy.

20. An integrated circuit assembly comprising:

an electronic chip; and

a conductive structure including a support structure, the conductive structure having a vaporization temperature and the conductive structure including the support structure is embedded in a material layer having a vaporization temperature less than the vaporization temperature of the conductive structure, the material layer is formed on the electronic chip and the conductive structure is coupled to the electronic chip.

21. The integrated circuit assembly of claim 20, wherein the electronic chip is a microprocessor.

22. An integrated circuit memory device comprising:

an electronic memory chip; and

a ribbed structure mounted on the electronic memory chip and capable of protecting an air-bridge structure and supporting a C4 structure.

23. The integrated circuit memory device of claim 22, wherein the ribbed structure is fabricated from an inorganic insulator.

24. The integrated circuit memory device of claim 22, wherein the ribbed structure is fabricated from an organic material.

25. The integrated circuit memory device of claim 22, wherein the ribbed structure is fabricated from of a mix of organic and inorganic materials.

26. An integrated circuit assembly comprising:

an electronic chip; and

a post structure mounted on the electronic chip and capable of protecting an air-bridge structure and supporting a C4 structure.

27. The integrated circuit assembly of claim 26, wherein the post structure is fabricated from the same material as the air-bridge structure.

28. The integrated circuit assembly of claim 26, wherein the post structure is mounted on an insulating base formed on the electronic chip.

29. The integrated circuit assembly of claim 26, wherein the post structure is fabricated from an insulator.

30. The integrated circuit assembly of claim 26, wherein the insulator is silicon dioxide.

31. The integrated circuit assembly of claim 26, wherein the post structure is fabricated from a polymer.

32. The integrated circuit assembly of claim 31, wherein the polymer is polyimide.

33. An integrated circuit assembly comprising:

an electronic chip including a plurality of electronic devices;

a plurality of conductive segments capable of interconnecting the plurality of electronic devices, each of the plurality of conductive segments having a surface area in contact with a material having a dielectric constant of about 1;

a C4 connection coupled to the electronic chip through the plurality of conductive segments; and

a substrate coupled to the C4 connection.

34. The integrated circuit assembly of claim 33, wherein the integrated circuit assembly is hermetically sealed.

35. The integrated circuit assembly of claim 34, wherein the integrated circuit assembly is back filled with helium.

36. The integrated circuit assembly of claim 34, wherein the integrated circuit assembly is back filled with a helium rich gas mixture.

37. The integrated circuit assembly of claim 33, wherein the material is air.

38. The integrated circuit assembly of claim 33, wherein the material is a foam.

39. The integrated circuit assembly of claim 33, further comprising a heat sink coupled to the electronic chip.

40. The integrated circuit assembly of claim 39, wherein the integrated circuit assembly is hermetically sealed.

41. The integrated circuit assembly of claim 40, wherein the integrated circuit assembly is back filled with helium.

42. A computer system comprising:

a processor;

a memory device having a plurality of circuit devices, the memory device coupled to the processor; and

an air-bridge structure and a support structure fabricated on the memory device, the air-bridge structure capable of coupling at least two of the plurality of circuit devices and the support structure capable of supporting the memory device mounted as a flip chip.

43. The computer system of claim 42, wherein the air-bridge structure is embedded in a dielectric having a dielectric constant of about 1.

44. The computer system of claim 42, wherein the support structure fabricated on the memory device is a ribbed support structure.

45. A method of constructing an integrated circuit comprising:

fabricating a plurality of electronic devices on a substrate;

embedding a wiring structure in a plurality of materials having a plurality of vaporization temperatures, the plurality of materials is located on the substrate and the wiring structure interconnects the plurality of electronic devices;

mounting the integrated circuit on a packaging substrate; and

removing at least one of the plurality of materials after the integrated circuit is mounted on the packaging substrate.

46. The method of claim 45, further comprising:

attaching a C4 structure to the integrated circuit prior to mounting the integrated circuit on the packaging substrate.

47. The method of claim 46, wherein removing at least one of the plurality of materials after the integrated circuit is mounted on the packaging substrate comprises:

heating the integrated circuit.

48. The method of claim 47, wherein heating the integrated circuit comprises:

placing the integrated circuit in a furnace having an oxygen atmosphere heated to about 400 degrees centigrade.

49. A method of forming an air bridge structure comprising:

forming a support structure having a support structure vaporization temperature and having interstices on an electronic chip;

filling the interstices of the support structure with a fill material having a vaporization temperature that is less than the support structure vaporization temperature;

embedding a conductive structure in the support structure and the material;

mounting a connective structure on the support structure; and

removing the fill material.

50. The method of claim 49, wherein forming a support structure having a support structure vaporization temperature and having interstices on an electronic chip comprises:

depositing a layer of silicon dioxide on the electronic chip; and

etching the layer of silicon dioxide to form the support structure having interstices.

51. A method of forming an air bridge structure comprising:

forming a support structure having interstices on an electronic chip;

filling the interstices of the support structure with a fill material having a vaporization temperature that is less than the vaporization temperature of the support structure;

embedding a conductive structure in the fill material;

mounting a connective structure on the support structure; and

vaporizing the fill material.

52. The method of claim 51, wherein filling the interstices of the support structure with a material having a vaporization temperature that is less than the vaporization temperature of the support structure comprises:

depositing a layer of carbon on the electronic chip.

53. The method of claim 52, wherein depositing a layer of carbon on the electronic chip comprises:

sputtering the layer of carbon on the electronic chip.

54. The method of claim 53, further comprising:

planarizing the layer of carbon.

55. A method of forming an air bridge structure comprising:

forming a material layer on an electronic chip;

embedding a conductive structure and a conductive support structure in the material layer, the conductive structure is capable of electronically coupling to the electronic chip; and

removing the material layer.

56. The method of claim 55, wherein embedding a conductive structure and a conductive support structure in the material layer comprises:

etching the material layer to form a plurality of vertical wiring vias and a plurality of vertical support vias;

etching a wiring pattern in the material layer; and

applying a conductive material to the plurality of vertical wiring vias, the plurality of vertical support vias, and the wiring pattern.

57. The method of claim 56, wherein removing the material comprises:

vaporizing the material.

58. The method of claim 57, wherein vaporizing the material comprises:

processing the integrated circuit assembly in a furnace having an oxygen atmosphere at a temperature of approximately 400 degrees centigrade.

59. A method of forming an air bridge structure comprising:

forming a material layer on an electronic chip;

embedding a conductive structure and a conductive support structure in the material layer, the conductive structure is capable of being electronically coupled to the electronic chip;

mounting a connective structure on the support structure; and

removing the layer material.

60. The method of claim 59, further comprising:

attaching a heat sink to the electronic chip.

61. A method of packaging an integrated circuit comprising:

fabricating an integrated circuit structure including a conductive structure and a ribbed support structure embedded in a fill material;

mounting C4 pads on the integrated circuit structure;

mounting the integrated circuit structure on a substrate;

removing the fill material; and

backfilling with a gas and hermetically sealing the substrate.

62. The method of claim 61, wherein the gas is helium.

63. The method of claim 61, wherein the fill material is carbon.

64. The method of claim 61, wherein the fill material is a high temperature polymer.

65. The method of claim 61, wherein the high temperature polymer is polyimide.

66. The method of claim 61, where the structural material is a metal.

67. The method of claim 66, wherein the metal is copper.

68. The method of claim 61, wherein the structural material is SiO2.

69. The method of claim 61, wherein the structural material is Si3N4.

70. An integrated circuit assembly comprising:

an electronic chip;

a material layer having a plurality of vaporization temperatures, wherein the material layer includes a support structure having a number of support members that are approximately the length of one of the sides of the electronic chip; and

a conductive structure embedded in the material layer, the material layer is formed on the electronic chip and the conductive structure is coupled to the electronic chip.

71. An integrated circuit assembly comprising:

an electronic chip;

a plurality of material that includes a support structure having a number of support members that are approximately parallel to one of the sides of the electronic chip; and

a conductive structure embedded in the plurality of materials, each of the plurality of materials having a different vaporization temperature, the plurality of materials is formed on the electronic chip and the conductive structure is coupled to the electronic chip.

72. An integrated circuit assembly comprising:

an electronic chip; and

a conductive structure embedded in a material layer having a structural component having a structural vaporization temperature and a non-structural component having a non-structural vaporization temperature less than the structural vaporization temperature, wherein the structure component has a number of support members that are approximately the length of one of the sides of the electronic chip and are approximately parallel to one of the sides of the electronic chip, wherein the number of support members are arranged to create a number of interstices.

73. An integrated circuit assembly comprising:

an electronic chip;

a ribbed support structure mounted on the electronic chip, the ribbed support structure having a vaporization temperature, wherein the ribbed support structure comprises a number of support members, wherein the number of support members are parallel to one of the sides of the electronic chip and are approximately the length of the electronic chip, the number of support members arranged to create an interstice;

a material filling the interstice, the material having a vaporization temperature that is less than the vaporization temperature of the ribbed support structure;

a controlled collapse chip connection (C4) connective structure mounted on the ribbed support structure, wherein the C4 structure is to mount on a silicon substrate; and

a conductive structure capable of coupling the electronic chip to the connective structure, the conductive structure embedded in the ribbed support structure and the material.