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Advanced processor with mechanism for packet distribution at high line rate

  • US 20050027793A1
  • Filed: 08/31/2004
  • Published: 02/03/2005
  • Est. Priority Date: 10/08/2002
  • Status: Active Grant
First Claim
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1. An advanced processor, comprising:

  • a packet distribution engine (PDE) configured to receive a plurality of packets from a networking input and to provide the plurality of packets in a substantially load-balanced distribution to a selected group of multiple threads; and

    a plurality of processor cores configured to execute the multiple threads.

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