Protection of several identical calculations

• US 20050027998A1
• Filed: 07/30/2004
• Published: 02/03/2005
• Est. Priority Date: 08/01/2003
• Status: Active Grant

• Current Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Teglia, Yannick, Liardet, Pierre-Yvan
• Granted Patent: US 7,885,408 B2
• Time in Patent Office: Days
• US Class Current: 713/193
• CPC Class Codes: H04L 2209/046 of operations, operands or results of the operations
• CPC Class Codes: H04L 2209/08 Randomization, e.g. dummy operations or using noise
• CPC Class Codes: H04L 9/003 for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
• CPC Class Codes: H04L 9/302 involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes

Abstract

A method for masking several identical functional processes manipulating digital data, including dividing the functional processes into steps at the end of each of which the process can be interrupted with the storage of at least one intermediary result, and successively executing the steps of at least two processes and selecting, at each step end, the process of the next step according to the result of a non-deterministic drawing of a number.

Claims

1. A method for masking several identical functional processes manipulating digital data, comprising:

dividing the functional processes into steps at the end of each of which the process can be interrupted with the storage of at least one intermediary result; and

successively executing the steps of at least two processes and selecting, at each step end, the process of the next step according to the result of a non-deterministic drawing of a number.

2. The method of claim 1, wherein said non-deterministic drawing is a random drawing.

3. The method of claim 1, wherein in case of an identity of the current drawing with the previous one, the same process remains executed for the current step, the other process being selected for the current step in case of a difference between the current drawing and the previous drawing.

4. The method of claim 1, wherein the drawing provides a one bit number, the state of which conditions the changing or the maintaining of the functional process selection with respect to the previous step.

5. A processor for executing identical functional processes dividable into steps at the end of each of which each process can be interrupted with the storage of an intermediary result, comprising means for selecting, according to the result of a non-deterministic drawing of a number, of at least one functional process to be executed.

6. The processor of claim 5, wherein said drawing provides a single bit, the state of which conditions the maintaining of the execution of the previous functional process or the switching to another functional process.

7. The processor of claim 5, comprising:

means for dividing the functional processes into steps at the end of each of which the process can be interrupted with the storage of at least one intermediary result; and

means for successively executing the steps of at least two processes and selecting, at each step end, the process of the next step according to the result of a non-deterministic drawing of a number.