Detachable substrate or detachable structure and method for the production thereof

• US 20050029224A1
• Filed: 04/11/2002
• Published: 02/10/2005
• Est. Priority Date: 04/13/2001
• Status: Active Grant

• Current Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Original Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Inventors: Aspar, Bernard, Moriceau, Hubert, Rayssac, Olivier, Zussy, Marc
• Granted Patent: US 7,713,369 B2
• Time in Patent Office: Days
• US Class Current: 216/33
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/76259 with separation/delamination along a porous layer
• CPC Class Codes: H01L 21/7813 leaving a reusable substrate, e.g. epitaxial lift off
• CPC Class Codes: H01L 2221/68318 Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: Y10T 156/11 Methods of delaminating, per se; i.e. , separating at bonding face

Abstract

The invention relates to the preparation of a thin layer comprising a step in which an interface is created between a layer used to create said thin layer and a substrate, characterized in that said interface is made in such way that it is provided with at least one first zone (Z1) which has a first level of mechanical strength, and a second zone (Z2) which has a level of mechanical strength which is substantially lower than that of the first zone. Said interface can be created by glueing surfaces which are prepared in a differentiated manner, by a layer which is buried and embrittled in a differentiated manner in said zones, or by an intermediate porous layer.

Claims

1. A method of preparing a thin layer comprising a step of producing an interface between a layer intended to form part of said thin layer and a substrate, wherein said interface is produced so as to have at least a first region having a first level of mechanical strength and a second region having a second level of mechanical strength significantly greater than the first level of mechanical strength, and wherein the first region is included within the second.

2. A method according to claim 1, wherein the second region constitutes a periphery of a wafer of which the first region constitutes a core of the wafer.

3. A method according to claim 1, wherein the first region is divided into fragments, each fragment being surrounded by the second region.

4. A method according to claim 1 wherein the interface is produced between a surface of the substrate and a surface of the layer and wherein the step of producing the interface includes a step of preparing at least one of the surfaces, and a bonding step during which the surface is of the substrate and the surface of the layer are bonded by molecular adhesion bonding.

5. A method according to claim 4, wherein the step of producing the interface includes a step of preparing the surface of the substrate and the surface of the layer.

6. A method according to claim 4, wherein the step of preparing at least one of the surface includes a treatment step of locally increasing the roughness of the surface in the first region.

7. A method according to claim 6, wherein the treatment step comprises localized acid etching of the surface in the first region.

8. A method according to claim 7, wherein the localized acid etching comprises etching with hydrofluoric acid, the surface in said second region being protected from said etching by a nitride layer, that is eliminated after etching.

9. A method according to claim 4, wherein the step of preparing at least one of the surfaces comprises a step in which the surface is roughened entirely and a step in which the roughness of some portions is enhanced to obtain greater bonding forces.

10. A method according to claim 9, wherein the roughness of some portions is reduced by one or more of chemical polishing, mechanical treatment, chemical-mechanical treatment, or dry etching.

11. A method according to claim 1 wherein the step of producing the interface includes a step of weakening a buried layer in a starting substrate, whereby at least a first region is made weaker than a second region, said buried layer being disposed between the layer and the substrate.

12. A method according to claim 11, wherein the weakening step includes a step of implanting at least one gaseous element, said implantation step being carried out differently for the first and second regions.

13. A method according to claim 1, wherein the step of producing the interface comprises a treatment step adapted to render a surface layer of the substrate porous, said treatment step being carried out in such a way as to render the first region more porous than the second region, and being followed by a covering step during which the layer is produced on top of said porous layer.

14. A method according to claim 13, wherein the substrate comprises silicon and the treatment step comprises electrolysis in an hydrofluoric acid medium.

15. A method according to claim 1, wherein the step of producing the interface is followed by a step of separating the layer from the substrate.

16. A method according to claim 15, wherein the method further comprises, after the step of producing the interface, a step of cutting at least one fragment of the layer containing the first region and the second region so that the second region extends along a periphery of the at least one fragment and a separation step during which the substrate and the thin layer are lifted off.

17. A method according to claim 15, wherein the method further comprises, between the step of producing the interface and the step of separating the layer from the substrate, a step of cutting the second region relative to the first region.

18. A method according to claim 15, wherein the method further comprises, between the step of producing the interface and the lift-off step, a step of producing in the layer all or part of microelectronic, optical or mechanical components.

19. A method according to claim 18, wherein each component is produced facing the first region of low mechanical strength surrounded by the second region of higher mechanical strength.

20. A method according to claim 15, wherein the method further comprises between the step of producing the interface and the separation step, there is a bonding step during which the layer is bonded to a second substrate.

21. A method according to claim 15, wherein said bonding step includes molecular adhesion bonding.

22. A method according to claim 15, wherein said bonding step comprises adhesive bonding.

23. A method according to claim 22, wherein said adhesive bonding comprises an adhesive that is hardened by UV radiation.

24. A method according to claim 15, wherein the lift-off step is carried out by comprises acid etching and application of mechanical stresses.

25. A method according to claim 1, wherein the layer comprises silicon.

26. An assembly comprising a layer on a substrate, said layer being connected to said substrate at an interface of which at least a selected first region has a first level of mechanical strength and a selected second region has a second level of mechanical strength significantly greater than the first level, and wherein the first region is included in the selected second region.

27. An assembly according to claim 26, wherein the selected second region constitutes a periphery of a wafer of which the selected first region constitutes a core of the wafer.

28. An assembly according to claim 26, wherein the selected first region is divided into fragments, each fragment being surrounded by a selected second region.

29. An assembly according to claim 26, wherein a fragment cut out in the layer contains the selected first region and the second region so that the selected second region extends along a periphery of said fragment.

30. An assembly according to any one of claims 26 to 29, wherein the layer includes all or part of a micro-electronic, optical or mechanical component.

31. An assembly according to claim 30, wherein said component faces the selected first region of low mechanical strength surrounded by the selected second region of higher mechanical strength.

32. An assembly according to claim 26, wherein the interface is produced between a surface of the substrate and a surface of the layer that and wherein the surfaces are molecular adhesion bonded.

33. An assembly according to claim 26, wherein at least one surface of the interface has greater roughness in said selected first region than in the selected second region.

34. An assembly according to claim 26, wherein the interface is formed by a buried layer in a starting substrate, the selected first region being weakened more than the selected second region.

35. An assembly according to claim 26, wherein the interface is formed by a porous layer between the layer and said substrate, the layer having different porosities in the selected first and selected second regions.

36. An assembly according to claim 26, wherein the layer is additionally bonded to a second substrate.

37. An assembly according to claim 36, wherein the second substrate is bonded by molecular adhesion.

38. An assembly according to claim 36, wherein the second substrate is adhesive bonded.

39. An assembly according to claim 38, wherein adhesive bonding comprises an adhesive that is hardened by UV radiation.

40. An assembly according to claim 26, wherein the layer comprises silicon.