Apparatus for measuring VS parameters in a wafer burn-in system

• US 20050030056A1
• Filed: 06/23/2004
• Published: 02/10/2005
• Est. Priority Date: 06/25/2003
• Status: Abandoned Application

• Current Assignee: From Thirty Incorporated
• Original Assignee: From Thirty Incorporated
• Inventors: Jeon, Tae-eul, Woo, Sang-kyung
• Application Number:
  US10/875,145
• Publication Number:
  US 20050030056A1
• Time in Patent Office: Days
• US Class Current: 324/750.50
• CPC Class Codes: G01R 31/2879 related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads
• CPC Class Codes: G01R 31/318511 Wafer Test

Abstract

The present invention relates to an apparatus for measuring voltage parameters in a wafer burn-in system which can simultaneously measure VS parameters for a great plenty of DUTs through a single test process. According to the present invention, there is provided an apparatus for measuring VS parameters in a wafer burn-in system, comprising: an FPGA for generating control signals including a driving voltage for measuring the VS parameters; a D/A converter for converting the digital control signals provided from the FPGA to analog control signals and then outputting the analog control signals; a VS circuit provided with n same circuit blocks, which are connected one-to-one to n DUTs (Devices Under Test), photo MOSs being provided at output stages of each of the n circuit blocks, wherein the control signals provided from the D/A converter are selectively transmitted to the respective DUTs by selectively switching on/off the photo MOSs in the respective circuit blocks. According to the present invention, by improving the degree of integration of the VS board, which is provided for measuring the VS parameters in the wafer burn-in system, the number of the VS parameters, which can be measured through the single test process, increases, and therefore, the time required in the wafer burn-in test process can be reduced. Furthermore, a noise voltage inputted from adjacent DUTs can be effectively removed.

Claims

1. An apparatus for measuring VS parameters of semiconductor devices formed on a wafer in a wafer burn-in system, comprising:

an FPGA for generating control signals including a driving voltage for measuring the VS parameters;

a D/A converter for converting the digital control signals provided from the FPGA to analog control signals and then outputting the analog control signals;

a VS circuit provided with n same circuit blocks, which are connected one-to-one to n DUTs (Devices Under Test), photo MOSs being provided at output stages of each of the n circuit blocks, wherein the control signals provided from the D/A converter are selectively transmitted to the respective DUTs by selectively switching on/off the photo MOSs in the respective circuit blocks.

2. The apparatus as claimed in claim 1, wherein the VS circuit is provided with seventy-two (72) circuit blocks, being connected to the seventy-two (72) DUTs, respectively.

3. The apparatus as claimed in claim 1, wherein an input stage of each of the circuit blocks is provided with a circuit element for attenuating a noise voltage.

4. The apparatus as claimed in claim 3, wherein the circuit element for attenuating the noise voltage comprises a photo MOS.