Analog phase change memory

• US 20050030788A1
• Filed: 08/04/2003
• Published: 02/10/2005
• Est. Priority Date: 08/04/2003
• Status: Active Grant

• Current Assignee: Ovonyx Memory Technology, LLC
• Original Assignee: Ovonyx Incorporated (Micron Technology, Inc.)
• Inventors: Parkinson, Ward D., Benn, Allen
• Granted Patent: US 7,471,552 B2
• Time in Patent Office: Days
• US Class Current: 365/163
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 27/005 with non-volatile charge storage, e.g. on floating gate or MNOS

Abstract

An analog memory may be formed using a phase change material. The phase change material may assume one of a number of resistance states which defines a specific analog characteristic to be stored.

Claims

1. A method comprising:

forming an analog memory using a phase change material.

2. The method of claim 1 including selectively enabling either digital or analog data to be stored in said memory.

3. The method of claim 1 including forming a phase change material having a programmably variable resistance for a plurality of cells.

4. The method of claim 3 including enabling said cells to be addressably located along rows and columns.

5. The method of claim 1 including forming a phase change material in a pore.

6. The method of claim 5 including forming a selection device to enable the control of current through said phase change material.

7. The method of claim 1 including enabling said memory to store in a single cell one of at least three different resistance values.

8. The method of claim 7 including enabling the resistance of the cell to be set by varying the magnitude of a programming current to the cell.

9. The method of claim 8 including enabling the resistance of the cell to read and readjust using a different programming current.

10. The method of claim 9 including enabling a resistance to be set in said cell proportional to a voltage or current characteristic to be stored.

11. A memory comprising:

a phase change material; and

a circuit to write analog data using said phase change material.

12. The memory of claim 11 including a circuit to selectively enable either digital or analog data to be stored in said memory.

13. The memory of claim 11 wherein said phase change material has a programmably variable resistance.

14. The memory of claim 13, said memory to store digital and analog data.

15. The memory of claim 14 wherein said memory to selectively store digital or analog data.

16. The memory of claim 15 including a circuit to enable a user to select analog or digital data storage.

17. The memory of claim 16 including an analog read sense amplifier, a digital read sense amplifier, an analog write circuit, and a digital write circuit.

18. The memory of claim 11 including a substrate, an insulator formed over said substrate, a pore defined in said insulator, and a phase change material in said pore.

19. The memory of claim 11 including a plurality of cells including a phase change material, said memory including a plurality of conductive lines to selectively enable access to said cells.

20. The memory of claim 19 wherein said phase change material includes a chalcogenide.

21. A system comprising:

a processor;

a wireless interface coupled to said processor; and

a semiconductor memory coupled to said processor, said memory including a phase change material and a circuit to write analog data for storage using said phase change material.

22. The memory of claim 21 including a circuit to selectively enable either digital or analog data to be stored in said memory.

23. The system of claim 21, said memory to store digital and analog data.

24. The system of claim 23 wherein said memory to selectively store digital or analog data.

25. The system of claim 24 including a circuit to enable a user to select analog or digital data storage.