IP packet ready PBX expansion circuit for a conventional personal computer with expandable, distributed DSP architecture
First Claim
1. An apparatus, comprising:
- a personal computer having a plurality of expansion slots;
one or more switch card circuits coupled to said expansion slots, each including a switching integrated circuit capable of coupling data in at least one timeslot to at least one other timeslot on a time division multiplexed bus and further comprising an interface circuit for a time division multiplexed bus and a packet switched bus; and
one or more port expansion units coupled together in a daisy chain by a time division multiplexed bus and a packet switched bus, each said daisy chain of port expansion units having a port expansion unit in the chain coupled to a switch card via a time division multiplexed bus and a packet switched bus which are extensions of the packet switched and time division multiplexed buses which couple each daisy chain together and also having a bus interface circuit for said buses, each said port expansion unit including one or more port interface circuits for interfacing the port expansion unit to a telecommunication line, one or more digital signal processors coupled between said bus interface circuit and said port interface circuits, and one or more microcontrollers coupled between said bus interface circuit and said one or more digital signal processors, wherein said personal computer includes a private branch exchange (PBX) program, which when executed causes said personal computer to implement a PBX process to communicate with said one or more microcontrollers via port interface circuits on each said port expansion unit to determine call progress and port status, to send data to said microcontrollers to control signaling functions implemented by said port interface circuits, and to control switching of said switch cards to implement at least some conventional PBX functionality.
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Abstract
A personal computer includes a PBX control program and one or more switch cards located in expansion board slots. The one or more switch cards are coupled to one or more port expansion units (PEU), which are coupled to telecommunication lines out to the various extension phones at the customer premises. Each PEU contains its own digital signal processor (DSP) so that distributed digital signal processing may be implemented to avoid any bottlenecks. One master PEU is coupled to a switch card by a time division multiplexed (TDMA) bus as well as a packet switched control bus, and all the other PEUs, if any, are coupled to the master PEU by extensions of the TDMA and packet switched buses. The TDMA bus carries PBX real time conversations while the packet switched bus carries control information, voicemail outbound message data packets, and inbound voicemail data packets.
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Citations
18 Claims
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1. An apparatus, comprising:
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a personal computer having a plurality of expansion slots;
one or more switch card circuits coupled to said expansion slots, each including a switching integrated circuit capable of coupling data in at least one timeslot to at least one other timeslot on a time division multiplexed bus and further comprising an interface circuit for a time division multiplexed bus and a packet switched bus; and
one or more port expansion units coupled together in a daisy chain by a time division multiplexed bus and a packet switched bus, each said daisy chain of port expansion units having a port expansion unit in the chain coupled to a switch card via a time division multiplexed bus and a packet switched bus which are extensions of the packet switched and time division multiplexed buses which couple each daisy chain together and also having a bus interface circuit for said buses, each said port expansion unit including one or more port interface circuits for interfacing the port expansion unit to a telecommunication line, one or more digital signal processors coupled between said bus interface circuit and said port interface circuits, and one or more microcontrollers coupled between said bus interface circuit and said one or more digital signal processors, wherein said personal computer includes a private branch exchange (PBX) program, which when executed causes said personal computer to implement a PBX process to communicate with said one or more microcontrollers via port interface circuits on each said port expansion unit to determine call progress and port status, to send data to said microcontrollers to control signaling functions implemented by said port interface circuits, and to control switching of said switch cards to implement at least some conventional PBX functionality. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of operating a PBX system on a personal computer, comprising:
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loading code for one or more digital signal processors (DSPs), and programming a field programmable gate array (FPGA) by a microcontroller (MC);
initializing, by said one or more DSPs, each function and waiting for channel assignments by said MC;
learning an address of the FPGA by watching a match bit of a token;
interrupting, by the FPGA, the MC after the address has been learned, and setting an operational flag, transmitting a packet to a PBX program on a host computer to indicate a port expansion unit (PEU) including the MC, the one or more DSPs, and the FPGA is operational;
transmitting a predefined packet to said PBX program indicating how many ports the PEU includes;
receiving a response back from said PBX program with an assignment of a channel on a bus for each port on the PEU;
distributing, by the microcontroller, of the assigned channels among the one or more DSPs; and
transmitting to the one or more DSPs a start processing signal. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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Specification