Method and system for managing traffic in fibre channel systems

• US 20050030978A1
• Filed: 07/20/2004
• Published: 02/10/2005
• Est. Priority Date: 07/21/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: QLogic Corporation (Marvell Technology Group Limited)
• Inventors: Dropps, Frank R., Papenfuss, Gary M., Kohlwey, Ernest G., Verba, Craig M., Owen, Mark A.
• Granted Patent: US 7,430,175 B2
• Time in Patent Office: Days
• US Class Current: 370/512
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/28 in relation to timing considerations
• CPC Class Codes: H04L 47/32 by discarding or delaying data units, e.g. packets or frames
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/357 Fibre channel switches

Abstract

Method and system for routing fibre channel frames using a fibre channel switch element is provided. The method includes, inserting a time stamp value in a fibre channel frame that is received at a receive segment of the fibre channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fibre channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fibre channel frame with a programmed time out value and a global counter value.

Claims

1. A method for routing fibre channel frames using a fibre channel switch element, comprising:

inserting a time stamp value in a fibre channel frame that is received at a receive segment of the fibre channel switch element;

determining if a timeout occurs after a frame arrives at a receive buffer; and

processing the frame if the timeout occurred.

2. The method of claim 1, further comprising:

determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data;

subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fibre channel switch element.

3. The method of claim 1, wherein a timeout checker circuit extracts the timeout value and compares it to a global counter value and a major time out value.

4. The method of claim 1, wherein a timeout checker circuit extracts the timeout value and compares it to a global counter value and a minor time out value.

5. The method of claim 3, wherein a fibre channel switch element processor programs a major time out value.

6. The method of claim 4, wherein a fibre channel switch element processor programs a minor time out value.

7. The method of claim 1, wherein if a timeout occurs, the receive segment sets a status flag for the transmit segment.

14. The method of claim 1, wherein end to end frame timing is provided, without synchronizing plural switch elements of a fabric.

8. A fibre channel switch element for routing fibre channel frames, comprising:

a receive and transmit segment for receiving and transmitting fibre channel frames, wherein the receive and transmit segments include a timeout checker circuit that declares a timeout after comparing a time stamp value that is inserted in a fibre channel frame with a programmed time out value and a global counter value.

9. The switch element of claim 8, wherein the programmed time out value is used to declare a major or minor timeout.

10. The switch element of claim 8, wherein a fibre channel frame received by the receive segment includes a delta time value, which specifies an accumulated elapsed time for a frame in transit.

11. The switch element of claim 10, wherein if an incoming frame includes the delta time feature then the delta time value is subtracted from the global counter value, wherein the result of the subtraction becomes the delta time value for the frame when the frame moves from the receive segment to the transmit segment.

12. The switch element of claim 9, wherein the switch element tosses a frame if a major timeout occurs.

13. The switch element of claim 9, wherein the switch continues processing a frame if a minor timeout occurs.

15. The switch element of claim 8, wherein end to end frame timing is provided, without synchronizing plural switch elements of a fabric.