Circuit arrangement for supplying voltage to a load

• US 20050035661A1
• Filed: 06/16/2004
• Published: 02/17/2005
• Est. Priority Date: 06/20/2003
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Frank, Wolfgang
• Granted Patent: US 7,092,266 B2
• Time in Patent Office: Days
• US Class Current: 307/66
• CPC Class Codes: G05F 1/70 Regulating power factor; Regulating reactive current or power
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/4208 Arrangements for improving power factor of AC input
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

The present invention relates to a circuit arrangement for supplying voltage to a load during normal operation and in a standby mode, with the arrangement having the following features:

• • input terminals (K1, K2) for application of a supply voltage (Vin),
  • a first converter unit (1, 2) having a PFC (1) and a flyback converter connected downstream from it, with the PFC (1) producing an intermediate voltage (Vb) across a capacitive energy storage element (C1) during normal operation,
  • a converter unit (3), which is coupled to the input terminals (K1, K2) and produces an output voltage (Vstb) across the first output terminals (K7, K8) when in the standby mode, and which has second output terminals (K9, K10) which are coupled to the capacitive energy storage element (C1) in the PFC (1).

Claims

1. A circuit arrangement for supplying voltage to a load during normal operation and in a standby mode, with the arrangement having the following features:

input terminals (K1, K2) for application of a supply voltage (Vin),

a first converter unit (1, 2), which is coupled to the input terminals (K1, K2) and which has a power factor correction circuit (1) and a switch-mode converter (2) which is connected downstream from the power factor correction circuit (1), with the power factor correction circuit (1) producing an intermediate voltage (Vb) across a capacitive energy storage element (C1) during normal operation, and the switch-mode converter (2) producing an output voltage (Vout) from the intermediate voltage (Vb), at the output terminals (K5m K6) of the first converter unit (1),

a second converter unit (3) which is coupled to the input terminals (K1, K2), and which produces an output voltage (Vstb) at first output terminals (K7, K8) when in the standby mode,

wherein

the second converter unit (3) has second output terminals (K9, K10), which are coupled to the capacitive energy storage element (C1) in the power factor correction circuit (1) for supplying voltage to the capacitive energy storage element (C1) when in the standby mode.

2. The circuit arrangement as claimed in claim 1, in which the second converter unit (3) has a switch-mode converter with a semiconductor switch (T3), which is connected in series with a primary coil (Lp2) of a transformer (TR2), with the transformer (TR2) having a first secondary coil (Ls31) which is coupled to the first output terminals (K7, K8), and having a second secondary coil (Ls32), which is coupled to the capacitive energy storage element (C1) in the power factor correction circuit (1).

3. The circuit arrangement as claimed in claim 2, in which a first rectifier arrangement (D31, C31) is connected between the first secondary coil (Ls31) and the first output terminals (K7, K8), and a second rectifier arrangement (D32, C32) is connected between the second secondary coil (Ls32) and the capacitive energy storage element (C1).

4. The circuit arrangement as claimed in one of the preceding claims, in which the first and second converter units (1, 2, 3) are matched to one another such that the intermediate voltage which is produced across the capacitive energy storage element (C1) by the power factor correction circuit (1) during normal operation corresponds at least approximately to the voltage which is produced across the capacitive energy storage element (C1) by the second converter unit (3) when in the standby mode.

5. The circuit arrangement as claimed in one of the preceding claims, which has a control circuit (4) which is coupled to the first and second converter units (1, 2, 3) and switches the first and second converter units (1, 2, 3) to a first or a second operating state in each case, on the basis of a signal (STB) which indicates the standby mode or normal operation.

6. The circuit arrangement as claimed in one of the preceding claims, in which the power factor correction circuit (1) has a step-up controller.

7. The circuit arrangement as claimed in one of the preceding claims, in which the switch-mode converter (2), which is connected downstream from the power factor correction circuit (1), is a step-down controller.

8. The circuit arrangement as claimed in one of the preceding claims, in which a rectifier arrangement (10) is connected between the input terminals (K1, K2) and the power factor correction circuit (1).

9. The circuit arrangement as claimed in one of the preceding claims, in which a rectifier arrangement (10) is connected between the input terminals (K1, K2) and the second converter unit (2).